Modelling solder extrusion using J-integral method

C. Selvanayagam, Teng Di Sheng
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Abstract

Solder extrusion is a phenomenon where molten solder fills a crack in the solder resist during reflow, causing a short failure. FEA was used to first understand this phenomenon, and then investigate the effect of die warpage, presence of stacked via and substrate CTE on solder extrusion risk. A 2D crack propagation model was developed. This model assumes the presence of an initial crack and calculates the propensity of the crack to grow using the J-integral method. The J-integral is equivalent to the energy release rate. Fracture can be predicted by comparing calculated values of J-integral to a critical value for the material being evaluated. This work is important because in the future it can be extended to predict solder extrusion risk before the first packages are built, taking into account factors such as stacked vias, copper plane placements, substrate material properties, size, and warpage. In addition, this model can be used to optimize locations of 3-stack vias and copper planes, in compliance with electrical design.
用j积分法对焊料挤压进行建模
焊料挤压是一种现象,在回流过程中,熔化的焊料填充焊锡电阻中的裂纹,导致短暂失效。首先利用有限元分析了解了这一现象,然后研究了模具翘曲、堆积过孔和衬底CTE对焊料挤压风险的影响。建立了二维裂纹扩展模型。该模型假设存在初始裂纹,并使用j积分法计算裂纹的扩展倾向。j积分等于能量释放速率。通过将j积分的计算值与被评估材料的临界值进行比较,可以预测断裂。这项工作很重要,因为在未来,它可以扩展到在构建第一个封装之前预测焊料挤压风险,考虑到堆叠过孔、铜平面放置、基板材料特性、尺寸和翘曲等因素。此外,该模型可用于优化三叠通孔和铜平面的位置,以符合电气设计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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