Performance evaluation of DG-MOSFETs and DG-TFETs with Ferroelectric insulation layer

Abstract

In this work, we have presented the effect of Ferroelectric (FE) gate dielectric in Double Gate MOSFET and TFET and their contemporary Dopingless and Junctionless variants. A comprehensive and comparative analysis has been carried out to study the SS, $\mathrm{I}_{\text{ON}},\mathrm{I}_{\text{OFF}},\mathrm{V}_{\text{th}}$ and $\mathrm{I}_{\text{ON}}/\mathrm{I}_{\text{OFF}}$ ratio by choosing uniform values of gate workfunctions and suitable values of source/drain workfunctions and the FE parameters. The steepest SS of 20.28 mV/decade is observed in case of DGFeTFET with a boost of about 3 orders of magnitude in $\mathrm{I}_{\text{ON}}$ while the largest improvement in SS due to introduction of FE layer is shown by JLDGTFET. Further, the impact of variation of device geometrical parameter $(\mathrm{t}_{\text{fe}})$ and the ferroelectric parameters ($\mathrm{E}_{\mathrm{c}}$ and $\mathrm{P}_{\mathrm{s}})$ on drain current has also been studied.