E. Carman, P. Parris, H. Chaffai, Fabrice Cotdeloup, Serge Debortoii, E. Hemon, J. Lin-Kwang, O. Perat, T. Sicard
{"title":"Single poly EEPROM for smart power IC's","authors":"E. Carman, P. Parris, H. Chaffai, Fabrice Cotdeloup, Serge Debortoii, E. Hemon, J. Lin-Kwang, O. Perat, T. Sicard","doi":"10.1109/ISPSD.2000.856800","DOIUrl":null,"url":null,"abstract":"Smart power integrated circuits need low density memory for applications such as trimming, IC customization, system addresses, and part traceability with few program/erase cycles. Memory solutions must be low cost and demonstrate high reliability in automotive environments. Programmability in the application is an advantage. We have developed a single poly EEPROM that meets these requirements and in addition gives significant die area savings over traditional low cost memory techniques.","PeriodicalId":260241,"journal":{"name":"12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2000.856800","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
Smart power integrated circuits need low density memory for applications such as trimming, IC customization, system addresses, and part traceability with few program/erase cycles. Memory solutions must be low cost and demonstrate high reliability in automotive environments. Programmability in the application is an advantage. We have developed a single poly EEPROM that meets these requirements and in addition gives significant die area savings over traditional low cost memory techniques.