A BiCMOS fully-differential 10-bit 40 MHz pipelined ADC

T. Shu, K. Bacrania, R. Gokhale
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引用次数: 1

Abstract

A BiCMOS fully-differential, 10-bit, 40 MHz pipelined ADC has been developed. The ADC can digitize not only a fully-differential but also a single-ended signal over a wide input range with little variation in performance. At f/sub s/=40 MHz, the ADC exhibits a signal-to-(noise+distortion) ratio (SNDR) of 57.1 dB and consumes <400 mW from a single 5-V supply.
一个BiCMOS全差分10位40 MHz流水线ADC
开发了一种BiCMOS全差分、10位、40 MHz的流水线ADC。ADC不仅可以数字化全差分信号,还可以数字化宽输入范围内的单端信号,而性能变化很小。在f/sub /=40 MHz时,ADC的信噪比(SNDR)为57.1 dB,单个5-V电源的功耗<400 mW。
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