SEL Site Localization Using Masking and PEM Imaging Techniques: A Case Study on Xilinx 28nm 7-Series FPGAs

Abstract

An unusual methodology for localizing sparse SEL-susceptible sites was successfully used to isolate the die region and identify the sensitive subcircuit responsible for a low cross-section, low-current latchup susceptibility in Xilinx 28nm 7-Series FPGAs. Die masking and photoemission electron microscopy (PEM) imaging contributed to the identification of the circuitry responsible for the latchup susceptibility in 7-Series devices. These results point to a possible approach for using selected devices from this family in high reliability space applications.