Optimization of burn-in test for many-core processors through adaptive spatiotemporal power migration

2010 IEEE International Test Conference Pub Date : 2010-11-01 DOI:10.1109/TEST.2010.5699205

M. Cho, N. Sathe, A. Raychowdhury, S. Mukhopadhyay

引用次数: 11

Abstract

We present adaptive spatiotemporal power migration (ASTPM) for burn-in of many core chips. ASTPM adapts the number of simultaneously stressed cores and dynamically varies their location to prevent thermal runaway, improve test-quality, and optimize burn-in time.

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基于自适应时空功率迁移的多核处理器老化测试优化

针对多核心芯片的老化问题，提出了自适应时空功率迁移(ASTPM)算法。ASTPM可调整同时受力岩心的数量，并动态改变其位置，以防止热失控，提高测试质量，优化老化时间。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2010 IEEE International Test Conference

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