Performance analysis of a 10-Gbit/s digital switch on MCM

Abstract

The paper describes a test device realised as an MCM including four identical unencapsulated ASICs mounted on a 5-layer thin-film substrate. The MCM is a 12.8 Gbit/sec data switch and it has been designed with the purpose of performance evaluation of the module interconnection technology. A validation methodology has been developed to highlight the effect of variables such as line properties, switching noise, crosstalk and buffer topologies on the signal integrity. This approach has been used to characterise the transmission rate of the digital switch and to evaluate the system performance of the interconnection technology.