A unified method for parametric fault characterization of post-bond TSVs

Yu-Hsiang Lin, Shi-Yu Huang, Kun-Han Tsai, Wu-Tung Cheng, S. Sunter
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引用次数: 17

Abstract

A TSV in a 3D IC could suffer from two major types of parametric faults - a resistive open fault, or a leakage fault. Dealing with these parametric faults (which do not destroy the functionality of a TSV completely but only degrade its quality or performance) is often trickier than dealing with a stuck-at fault. Previous works have not proposed a unified test structure and method that can characterize their respective effects. Based on our previous test structure, called VOT (Variable Output Threshold) scheme for delay faults, we propose a unified in-situ characterization flow for both parametric fault types of a post-bond TSV. With this flow, one can easily derive a more insightful assessment of a parametric fault in production test, process monitoring, and/or diagnosis-driven yield learning.
一种统一的键后tsv参数故障表征方法
三维集成电路中的TSV可能遭受两种主要类型的参数故障-电阻性开路故障或泄漏故障。处理这些参数故障(它们不会完全破坏TSV的功能,但只会降低其质量或性能)通常比处理卡在故障更棘手。以往的工作并没有提出一个统一的测试结构和方法来表征它们各自的效果。基于我们之前的延迟故障测试结构VOT(可变输出阈值)方案,我们提出了一个统一的键后TSV两种参数故障类型的原位表征流程。有了这个流程,人们可以很容易地对生产测试、过程监控和/或诊断驱动的产量学习中的参数故障进行更深刻的评估。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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