H. Yu, S. Chang, M. Aoulaiche, B. Kaczer, P. Absil, C. Adelmann, T. Hoffmann, S. Biesemans, C. Wann, Y. Mii
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引用次数: 0
Abstract
The transistor VT tuning mechanism in metal-gate/high-k (MG/HK) gate stack doped with rare-earth elements (Dysprosium or Dy in this work) is studied in transistors fabricated by either a gate-first or a gate-last approach. Except the commonly believed interface dipole, this work provides additional evidence that the bulk trapping charges can also play an important role in determining the device VT for above-mentioned gate stacks. It is thus suggested that careful design of capping layer thickness as well as the thermal budget for intermixing the capping layer with host dielectrics are necessary to eliminate the impact from bulk trapping charges to the device performance.