Simulation, fabrication and characterization of 6500V 4H-SiC power DMOSFETs

Abstract

4H-SiC power DMOSFETs with breakdown voltage higher than 8.0 kV has been successfully fabricated by using an 60μm-thick, 1.0×10¹⁵ cm⁻³ doped drift epilayer. In this paper, the simulation, the fabrication, and the electrical characteristics of 4H-SiC DMOSFETs were reported. A peak effective channel mobility of 20 cm²/Vs was extracted from a test MOSFET. A specific on-resistance of 80 mΩ-cm² were measured with at a VGS of 20V, a 32% reduction in Ron sp, compared to a previously reported value. A leakage current of 12 μΑ was measured at a drain bias of 8.0 kV from a 4H-SiC DMOSFE with an active area of 1.0×10⁻² cm². In this report, four new termination structures (T1-T3) were implemented in test PiN diodes and tested, for a reduction of termination length.