用于大孔径超声阵列的高度集成多路复用和缓冲电子器件。

IF 5 Q1 ENGINEERING, BIOMEDICAL
BME frontiers Pub Date : 2022-01-01 Epub Date: 2022-06-30 DOI:10.34133/2022/9870386
Robert Wodnicki, Haochen Kang, Di Li, Douglas N Stephens, Hayong Jung, Yizhe Sun, Ruimin Chen, Lai-Ming Jiang, Nestor E Cabrera-Munoz, Josquin Foiret, Qifa Zhou, Katherine W Ferrara
{"title":"用于大孔径超声阵列的高度集成多路复用和缓冲电子器件。","authors":"Robert Wodnicki, Haochen Kang, Di Li, Douglas N Stephens, Hayong Jung, Yizhe Sun, Ruimin Chen, Lai-Ming Jiang, Nestor E Cabrera-Munoz, Josquin Foiret, Qifa Zhou, Katherine W Ferrara","doi":"10.34133/2022/9870386","DOIUrl":null,"url":null,"abstract":"<p><p>Large aperture ultrasonic arrays can be implemented by tiling together multiple pretested modules of high-density acoustic arrays with closely integrated multiplexing and buffering electronics to form a larger aperture with high yield. These modular arrays can be used to implement large 1.75D array apertures capable of focusing in elevation for uniform slice thickness along the axial direction which can improve image contrast. An important goal for large array tiling is obtaining high yield and sensitivity while reducing extraneous image artifacts. We have been developing tileable acoustic-electric modules for the implementation of large array apertures utilizing Application Specific Integrated Circuits (ASICs) implemented using 0.35 <b><i>μ</i></b> m high voltage (50 V) CMOS. Multiple generations of ASICs have been designed and tested. The ASICs were integrated with high-density transducer arrays for acoustic testing and imaging. The modules were further interfaced to a Verasonics Vantage imaging system and were used to image industry standard ultrasound phantoms. The first-generation modules comprise ASICs with both multiplexing and buffering electronics on-chip and have demonstrated a switching artifact which was visible in the images. A second-generation ASIC design incorporates low switching injection circuits which effectively mitigate the artifacts observed with the first-generation devices. Here, we present the architecture of the two ASIC designs and module types as well imaging results that demonstrate reduction in switching artifacts for the second-generation devices.</p>","PeriodicalId":72430,"journal":{"name":"BME frontiers","volume":null,"pages":null},"PeriodicalIF":5.0000,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9348545/pdf/","citationCount":"0","resultStr":"{\"title\":\"Highly Integrated Multiplexing and Buffering Electronics for Large Aperture Ultrasonic Arrays.\",\"authors\":\"Robert Wodnicki, Haochen Kang, Di Li, Douglas N Stephens, Hayong Jung, Yizhe Sun, Ruimin Chen, Lai-Ming Jiang, Nestor E Cabrera-Munoz, Josquin Foiret, Qifa Zhou, Katherine W Ferrara\",\"doi\":\"10.34133/2022/9870386\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p><p>Large aperture ultrasonic arrays can be implemented by tiling together multiple pretested modules of high-density acoustic arrays with closely integrated multiplexing and buffering electronics to form a larger aperture with high yield. These modular arrays can be used to implement large 1.75D array apertures capable of focusing in elevation for uniform slice thickness along the axial direction which can improve image contrast. An important goal for large array tiling is obtaining high yield and sensitivity while reducing extraneous image artifacts. We have been developing tileable acoustic-electric modules for the implementation of large array apertures utilizing Application Specific Integrated Circuits (ASICs) implemented using 0.35 <b><i>μ</i></b> m high voltage (50 V) CMOS. Multiple generations of ASICs have been designed and tested. The ASICs were integrated with high-density transducer arrays for acoustic testing and imaging. The modules were further interfaced to a Verasonics Vantage imaging system and were used to image industry standard ultrasound phantoms. The first-generation modules comprise ASICs with both multiplexing and buffering electronics on-chip and have demonstrated a switching artifact which was visible in the images. A second-generation ASIC design incorporates low switching injection circuits which effectively mitigate the artifacts observed with the first-generation devices. Here, we present the architecture of the two ASIC designs and module types as well imaging results that demonstrate reduction in switching artifacts for the second-generation devices.</p>\",\"PeriodicalId\":72430,\"journal\":{\"name\":\"BME frontiers\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":5.0000,\"publicationDate\":\"2022-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9348545/pdf/\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"BME frontiers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.34133/2022/9870386\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"2022/6/30 0:00:00\",\"PubModel\":\"Epub\",\"JCR\":\"Q1\",\"JCRName\":\"ENGINEERING, BIOMEDICAL\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"BME frontiers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.34133/2022/9870386","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2022/6/30 0:00:00","PubModel":"Epub","JCR":"Q1","JCRName":"ENGINEERING, BIOMEDICAL","Score":null,"Total":0}
引用次数: 0

摘要

大孔径超声阵列可以通过将高密度声学阵列的多个预测试模块与紧密集成的多路复用和缓冲电子器件拼接在一起来实现,从而以高产率形成更大的孔径。这些模块化阵列可用于实现大的1.75D阵列孔径,该阵列孔径能够在仰角上聚焦以沿着轴向方向获得均匀的切片厚度,这可以提高图像对比度。大阵列拼接的一个重要目标是获得高产量和高灵敏度,同时减少多余的图像伪影。我们一直在开发可平铺的声电模块,用于利用0.35μm高压(50V)CMOS实现的专用集成电路(ASIC)实现大阵列孔径。已经设计并测试了多代ASIC。ASIC与高密度换能器阵列集成,用于声学测试和成像。这些模块进一步连接到Verasonics Vantage成像系统,并用于对行业标准超声模型进行成像。第一代模块包括芯片上具有多路复用和缓冲电子器件的ASIC,并且已经证明了在图像中可见的切换伪像。第二代ASIC设计结合了低开关注入电路,其有效地减轻了用第一代器件观察到的伪影。在这里,我们介绍了两种ASIC设计的架构和模块类型,以及成像结果,这些结果证明了第二代设备的开关伪影的减少。
本文章由计算机程序翻译,如有差异,请以英文原文为准。

Highly Integrated Multiplexing and Buffering Electronics for Large Aperture Ultrasonic Arrays.

Highly Integrated Multiplexing and Buffering Electronics for Large Aperture Ultrasonic Arrays.

Highly Integrated Multiplexing and Buffering Electronics for Large Aperture Ultrasonic Arrays.

Highly Integrated Multiplexing and Buffering Electronics for Large Aperture Ultrasonic Arrays.

Large aperture ultrasonic arrays can be implemented by tiling together multiple pretested modules of high-density acoustic arrays with closely integrated multiplexing and buffering electronics to form a larger aperture with high yield. These modular arrays can be used to implement large 1.75D array apertures capable of focusing in elevation for uniform slice thickness along the axial direction which can improve image contrast. An important goal for large array tiling is obtaining high yield and sensitivity while reducing extraneous image artifacts. We have been developing tileable acoustic-electric modules for the implementation of large array apertures utilizing Application Specific Integrated Circuits (ASICs) implemented using 0.35 μ m high voltage (50 V) CMOS. Multiple generations of ASICs have been designed and tested. The ASICs were integrated with high-density transducer arrays for acoustic testing and imaging. The modules were further interfaced to a Verasonics Vantage imaging system and were used to image industry standard ultrasound phantoms. The first-generation modules comprise ASICs with both multiplexing and buffering electronics on-chip and have demonstrated a switching artifact which was visible in the images. A second-generation ASIC design incorporates low switching injection circuits which effectively mitigate the artifacts observed with the first-generation devices. Here, we present the architecture of the two ASIC designs and module types as well imaging results that demonstrate reduction in switching artifacts for the second-generation devices.

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CiteScore
7.10
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