{"title":"使用电压差跨导放大器的积分器电路的勘误表","authors":"Kaza Malathi Santhoshini , Sarada Musala , Avireni Srinivasulu","doi":"10.1016/j.ssel.2020.12.002","DOIUrl":null,"url":null,"abstract":"<div><p>This paper illustrates a novel design of voltage-mode integrator using the active element, namely voltage difference transconductance amplifier (VDTA). The proposed circuit only requires one VDTA element and a single capacitor. This provides more beneficial for the fabrication of ICs in VLSI design. The designed circuit works with ±0.9 V supply voltage, uses a bias current of order 150 μA. And also, the transconductance (g<sub>m</sub>) is electronically tunable with the bias current. The proposed circuit is designed in a gpdk 180 nm CMOS process using a Cadence Virtuoso tool and also has the power dissipation of order 270 µW. The simulation results are functionally verified through experiment with the commercially available ICs LM13700. The proposed VDTA based integrator is highly useful in the dual slope/integrating type analogue to digital converters for higher resolutions.</p></div>","PeriodicalId":101175,"journal":{"name":"Solid State Electronics Letters","volume":"2 ","pages":"Pages 109-114"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/j.ssel.2020.12.002","citationCount":"1","resultStr":"{\"title\":\"Corrigendum to: An Integrator Circuit Using Voltage Difference Transconductance Amplifier\",\"authors\":\"Kaza Malathi Santhoshini , Sarada Musala , Avireni Srinivasulu\",\"doi\":\"10.1016/j.ssel.2020.12.002\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>This paper illustrates a novel design of voltage-mode integrator using the active element, namely voltage difference transconductance amplifier (VDTA). The proposed circuit only requires one VDTA element and a single capacitor. This provides more beneficial for the fabrication of ICs in VLSI design. The designed circuit works with ±0.9 V supply voltage, uses a bias current of order 150 μA. And also, the transconductance (g<sub>m</sub>) is electronically tunable with the bias current. The proposed circuit is designed in a gpdk 180 nm CMOS process using a Cadence Virtuoso tool and also has the power dissipation of order 270 µW. The simulation results are functionally verified through experiment with the commercially available ICs LM13700. The proposed VDTA based integrator is highly useful in the dual slope/integrating type analogue to digital converters for higher resolutions.</p></div>\",\"PeriodicalId\":101175,\"journal\":{\"name\":\"Solid State Electronics Letters\",\"volume\":\"2 \",\"pages\":\"Pages 109-114\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://sci-hub-pdf.com/10.1016/j.ssel.2020.12.002\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Solid State Electronics Letters\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S2589208820300284\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Solid State Electronics Letters","FirstCategoryId":"1085","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S2589208820300284","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Corrigendum to: An Integrator Circuit Using Voltage Difference Transconductance Amplifier
This paper illustrates a novel design of voltage-mode integrator using the active element, namely voltage difference transconductance amplifier (VDTA). The proposed circuit only requires one VDTA element and a single capacitor. This provides more beneficial for the fabrication of ICs in VLSI design. The designed circuit works with ±0.9 V supply voltage, uses a bias current of order 150 μA. And also, the transconductance (gm) is electronically tunable with the bias current. The proposed circuit is designed in a gpdk 180 nm CMOS process using a Cadence Virtuoso tool and also has the power dissipation of order 270 µW. The simulation results are functionally verified through experiment with the commercially available ICs LM13700. The proposed VDTA based integrator is highly useful in the dual slope/integrating type analogue to digital converters for higher resolutions.