利用离子束沉积技术优化低电阻率钨的微结构

F. Cerio, Rutvik J. Mehta, P. Turner, Jinho Kim, R. Caldwell
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引用次数: 0

摘要

随着每个集成节点的特征尺寸缩小,由于尺寸相关的影响,线路后端的导线和互连电阻率越来越成为一个挑战。金属薄膜的微结构控制是获得最低电阻率和材料选择的关键。在本文中,我们描述了在至少250°C的工艺室中,通过离子束沉积在辅助下将金属材料沉积到衬底上,以生产超低电阻率金属薄膜。离子束沉积的薄钨薄膜具有大而高取向的α(110)晶粒,其电阻率小于9 μΩ-cm,厚度小于300 Å,没有可识别的β相,预示着使用钨进行布线的存储和逻辑应用的优势。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Microstructural Optimization of Tungsten for Low Resistivity Using Ion Beam Deposition
As feature sizes shrink with each integration node, wire and interconnect resistivity in the back end of the line increasingly becomes a challenge due to size dependent effects. Microstructural control of metal thin films is critical for accessing the lowest resistivities alongside materials choice. In this paper, we describe depositing a metal material onto a substrate via ion beam deposition with assist in a process chamber at a temperature of at least 250°C to produce ultra-low resistivity metal films. Ion beam deposited thin tungsten films were grown with large and highly oriented α(110) grains having a resistivity less than 9 μΩ-cm and thickness less than 300 Å, with no discernable β-phase, presaging benefits for memory and logic applications using tungsten for wiring.
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