面积高效的3.3GHZ锁相环，采用45NM VLSI技术

{"title":"面积高效的3.3GHZ锁相环，采用45NM VLSI技术","authors":"U. Belorkar, S. Ladhake","doi":"10.5121/VLSIC.2011.2110","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":74899,"journal":{"name":"Symposium on VLSI Circuits : [proceedings]. Symposium on VLSI Circuits","volume":"39 1","pages":"116-126"},"PeriodicalIF":0.0000,"publicationDate":"2011-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Area Efficient 3.3GHZ Phase Locked Loop with Four Multiple Output Using 45NM VLSI Technology\",\"authors\":\"U. Belorkar, S. Ladhake\",\"doi\":\"10.5121/VLSIC.2011.2110\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\",\"PeriodicalId\":74899,\"journal\":{\"name\":\"Symposium on VLSI Circuits : [proceedings]. Symposium on VLSI Circuits\",\"volume\":\"39 1\",\"pages\":\"116-126\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-03-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Symposium on VLSI Circuits : [proceedings]. Symposium on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.5121/VLSIC.2011.2110\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Symposium on VLSI Circuits : [proceedings]. Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.5121/VLSIC.2011.2110","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}