{"title":"基于场调制的双栅极IGZO源门控晶体管的TCAD仿真","authors":"Ning Li, Zhao Rong, Lining Zhang, Min Zhang","doi":"10.1109/ICSICT49897.2020.9278220","DOIUrl":null,"url":null,"abstract":"In this work, a configurable indium-gallium-zinc-oxide source-gated transistors (SGT) is proposed based on the field modulation of schottky contacts. The device concept is evaluated through TCAD numerical device simulations and related parameters are discussed. The results show that the SGT device can be achieved by voltage regulation of two gates, the channel modulation gate and contact modulation gate, and that its saturation voltage and current are under a significant modulation within a wide range. While designs with metal engineering may suffer from Fermi level pinning, the proposed device provides an alternative method for design optimizations of SGT for their applications in low-power active-display circuits.","PeriodicalId":6727,"journal":{"name":"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)","volume":"26 1","pages":"1-3"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A dual-gate IGZO Source-Gated transistor based on field modulation by TCAD simulation\",\"authors\":\"Ning Li, Zhao Rong, Lining Zhang, Min Zhang\",\"doi\":\"10.1109/ICSICT49897.2020.9278220\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this work, a configurable indium-gallium-zinc-oxide source-gated transistors (SGT) is proposed based on the field modulation of schottky contacts. The device concept is evaluated through TCAD numerical device simulations and related parameters are discussed. The results show that the SGT device can be achieved by voltage regulation of two gates, the channel modulation gate and contact modulation gate, and that its saturation voltage and current are under a significant modulation within a wide range. While designs with metal engineering may suffer from Fermi level pinning, the proposed device provides an alternative method for design optimizations of SGT for their applications in low-power active-display circuits.\",\"PeriodicalId\":6727,\"journal\":{\"name\":\"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)\",\"volume\":\"26 1\",\"pages\":\"1-3\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-11-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICSICT49897.2020.9278220\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSICT49897.2020.9278220","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A dual-gate IGZO Source-Gated transistor based on field modulation by TCAD simulation
In this work, a configurable indium-gallium-zinc-oxide source-gated transistors (SGT) is proposed based on the field modulation of schottky contacts. The device concept is evaluated through TCAD numerical device simulations and related parameters are discussed. The results show that the SGT device can be achieved by voltage regulation of two gates, the channel modulation gate and contact modulation gate, and that its saturation voltage and current are under a significant modulation within a wide range. While designs with metal engineering may suffer from Fermi level pinning, the proposed device provides an alternative method for design optimizations of SGT for their applications in low-power active-display circuits.