A. Armstrong, S. Killmeyerz, J. Yee, G. Uscategui, R. Deming, Taewon Jung, R. Heilman, H. Patterson, Y. Ro, D. Myers, L. Mack, Xiaofang Mug
{"title":"并行光互连的设计趋势与挑战","authors":"A. Armstrong, S. Killmeyerz, J. Yee, G. Uscategui, R. Deming, Taewon Jung, R. Heilman, H. Patterson, Y. Ro, D. Myers, L. Mack, Xiaofang Mug","doi":"10.1109/LEOS.2001.969164","DOIUrl":null,"url":null,"abstract":"A 12-channel 3.125 Gb/s VCSEL driver IC has been designed in a SiGe BiCMOS process technology. The IC consists of 12 VCSEL drivers, a set of DACs providing per-channel adjustment of modulation and bias currents, peaking depth and width, and overcurrent threshold, and a three-wire serial interface which allows access to the DACs as well as internal registers for eye safety shutdown and other functions. The driver IC addresses many of the manufacturing issues in very short reach (VSR) parallel optical modules.","PeriodicalId":18008,"journal":{"name":"LEOS 2001. 14th Annual Meeting of the IEEE Lasers and Electro-Optics Society (Cat. No.01CH37242)","volume":"10 1","pages":"44-45 vol.1"},"PeriodicalIF":0.0000,"publicationDate":"2001-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Design trends and challenges for parallel optical interconnect\",\"authors\":\"A. Armstrong, S. Killmeyerz, J. Yee, G. Uscategui, R. Deming, Taewon Jung, R. Heilman, H. Patterson, Y. Ro, D. Myers, L. Mack, Xiaofang Mug\",\"doi\":\"10.1109/LEOS.2001.969164\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 12-channel 3.125 Gb/s VCSEL driver IC has been designed in a SiGe BiCMOS process technology. The IC consists of 12 VCSEL drivers, a set of DACs providing per-channel adjustment of modulation and bias currents, peaking depth and width, and overcurrent threshold, and a three-wire serial interface which allows access to the DACs as well as internal registers for eye safety shutdown and other functions. The driver IC addresses many of the manufacturing issues in very short reach (VSR) parallel optical modules.\",\"PeriodicalId\":18008,\"journal\":{\"name\":\"LEOS 2001. 14th Annual Meeting of the IEEE Lasers and Electro-Optics Society (Cat. No.01CH37242)\",\"volume\":\"10 1\",\"pages\":\"44-45 vol.1\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-11-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"LEOS 2001. 14th Annual Meeting of the IEEE Lasers and Electro-Optics Society (Cat. No.01CH37242)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/LEOS.2001.969164\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"LEOS 2001. 14th Annual Meeting of the IEEE Lasers and Electro-Optics Society (Cat. No.01CH37242)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LEOS.2001.969164","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design trends and challenges for parallel optical interconnect
A 12-channel 3.125 Gb/s VCSEL driver IC has been designed in a SiGe BiCMOS process technology. The IC consists of 12 VCSEL drivers, a set of DACs providing per-channel adjustment of modulation and bias currents, peaking depth and width, and overcurrent threshold, and a three-wire serial interface which allows access to the DACs as well as internal registers for eye safety shutdown and other functions. The driver IC addresses many of the manufacturing issues in very short reach (VSR) parallel optical modules.