MPRACE框架:一个用于与定制的基于fpga的加速器通信的开源堆栈

G. Marcus, Wenxue Gao, A. Kugel, R. Manner
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引用次数: 21

摘要

我们提出了一个用于开发定制FPGA板的开源堆栈,主要但不限于PCI Express互连。该堆栈支持当前的Linux发行版,由PCI驱动程序、DMA引擎的IP核、IO操作的硬件抽象库和用于有效处理应用程序和FPGA设计之间数据传输的缓冲区管理库组成。该堆栈已经在不同的硬件和软件平台上进行了验证,并提供了几个构建块,方便在应用程序中使用加速器。DMA Engine IP在采用Xilinx PCIe内核的PCIe 4通道板上提供高性能数据传输,最大读性能为380mb /s,写性能为700mb /s。缓冲区管理库允许使用该带宽的80-95%,同时减少了资源消耗和工作量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
The MPRACE framework: An open source stack for communication with custom FPGA-based accelerators
We present an open source stack for the development of custom FPGA boards, primarily but not limited to PCI Express interconnects. Supporting current Linux distributions, the stack consists of a PCI driver, an IP core for a DMA engine, a hardware abstraction library for IO operations, and a buffer management library for efficient handling of data transfers between an application and a FPGA design. The stack has been validated in diverse hardware and software platforms and provides several building blocks that facilitate the use of accelerators in applications. The DMA Engine IP provides high performance data transfers in PCIe 4-lane boards with Xilinx PCIe cores, with 380 MB/s read and 700 MB/s write maximum measured performance. The buffer management library allows the utilization of 80–95% of this bandwidth with reduced resource consumption and minimal effort.
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