{"title":"用于AI和ML加速器应用的模具间连接的HD-FOWLP上高密度互连的电气特性和设计","authors":"M. D. Rotaru, Li Kangrong","doi":"10.1109/EPTC50525.2020.9315178","DOIUrl":null,"url":null,"abstract":"High Density Fan Out Wafer Level Package (HD-FOWLP) can be an alternative for technologies such as Embedded Multi-Die Interconnect Bridge (EMIB) and silicon interposer to achieve heterogeneous integration for applications that requires ultra-high bandwidth for die to die communications. This work focusses on the electrical characteristics of this type of interconnect and explains why the metrics based on S-parameters regularly used for designing and qualifying interconnects on substrates and PCBs are not enough and may be misleading in this case. With the lines cross-sectional dimensions of, 1umx1um and respectively and Nyquist frequency around 1GHz, some of these lines operate at the onset of skin effect, with per-unit-length resistance and inductance undergoing severe dispersion. This is very different from signals routed as thicker and wider traces on an organic package, where the skin effect develops at much lower frequencies. It is also different from the on-die signal routing, where RC is an adequate model of the signal interconnect. Simulation examples of different interconnect structures and layouts are presented to support the findings reported here.","PeriodicalId":6790,"journal":{"name":"2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC)","volume":"16 1","pages":"430-434"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Electrical characterization and design of hyper-dense interconnect on HD-FOWLP for die to die connectivity for AI and ML accelerator applications\",\"authors\":\"M. D. Rotaru, Li Kangrong\",\"doi\":\"10.1109/EPTC50525.2020.9315178\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"High Density Fan Out Wafer Level Package (HD-FOWLP) can be an alternative for technologies such as Embedded Multi-Die Interconnect Bridge (EMIB) and silicon interposer to achieve heterogeneous integration for applications that requires ultra-high bandwidth for die to die communications. This work focusses on the electrical characteristics of this type of interconnect and explains why the metrics based on S-parameters regularly used for designing and qualifying interconnects on substrates and PCBs are not enough and may be misleading in this case. With the lines cross-sectional dimensions of, 1umx1um and respectively and Nyquist frequency around 1GHz, some of these lines operate at the onset of skin effect, with per-unit-length resistance and inductance undergoing severe dispersion. This is very different from signals routed as thicker and wider traces on an organic package, where the skin effect develops at much lower frequencies. It is also different from the on-die signal routing, where RC is an adequate model of the signal interconnect. Simulation examples of different interconnect structures and layouts are presented to support the findings reported here.\",\"PeriodicalId\":6790,\"journal\":{\"name\":\"2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC)\",\"volume\":\"16 1\",\"pages\":\"430-434\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-12-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPTC50525.2020.9315178\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC50525.2020.9315178","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Electrical characterization and design of hyper-dense interconnect on HD-FOWLP for die to die connectivity for AI and ML accelerator applications
High Density Fan Out Wafer Level Package (HD-FOWLP) can be an alternative for technologies such as Embedded Multi-Die Interconnect Bridge (EMIB) and silicon interposer to achieve heterogeneous integration for applications that requires ultra-high bandwidth for die to die communications. This work focusses on the electrical characteristics of this type of interconnect and explains why the metrics based on S-parameters regularly used for designing and qualifying interconnects on substrates and PCBs are not enough and may be misleading in this case. With the lines cross-sectional dimensions of, 1umx1um and respectively and Nyquist frequency around 1GHz, some of these lines operate at the onset of skin effect, with per-unit-length resistance and inductance undergoing severe dispersion. This is very different from signals routed as thicker and wider traces on an organic package, where the skin effect develops at much lower frequencies. It is also different from the on-die signal routing, where RC is an adequate model of the signal interconnect. Simulation examples of different interconnect structures and layouts are presented to support the findings reported here.