设计并组装带有控制器和DRAM堆栈的双面3D封装

Xi Liu, Ming Li, D. Mullen, J. Cline, S. Sitaraman
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引用次数: 10

摘要

微电子封装领域正向着小型化、低功耗、高性能的第三维度迈进。在本文中,我们提出了一种双面倒装晶片有机基板,在封装的一侧有记忆控制器,在封装的另一侧有3D堆叠的分解记忆晶片。该设计允许控制器直接通过衬底与DRAM堆栈接口,从而提供最短的互连路径,从而实现最快的信号传输速度。然而,这种在有机基板上的双面倒装芯片也会带来良率、组装、测试和可靠性方面的挑战。为了优化装配过程,建立了连续三维有限元模型来模拟装配过程。在这些模拟中,模拟了不同条件和材料下的各种装配工艺序列。此外,还建立了探测测试模型,研究了LGA引脚阵列与PCB插座的连通性。结果表明,精心选择装配步骤和封装材料对封装的成功组装至关重要,对探测测试也至关重要。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design and assembly of a double-sided 3D package with a controller and a DRAM stack
The microelectronic packaging field is moving into the third dimension for miniaturization, low power consumption, and better performance. In this paper, we present a double-sided flip-chip organic substrate with a memory controller on one side of the package, and 3D stacked disaggregated memory chips on the other side of the package. This design allows the controller to interface with the DRAM stack directly through the substrate providing the shortest possible interconnect path, and thus achieving the fastest signaling speed. However, this double-sided flip chip on organic substrate also causes yield, assembly, test, and reliability challenges. In order to optimize the assembly process, a sequential 3D finite-element model was developed to simulate the package assembly process. In these simulations, various assembly process sequences were simulated with different conditions and materials. In addition, a probing test model was also built to study the connectivity of the Land Grid Array (LGA) pin array with the PCB sockets. Results show that the careful selection of assembly steps and package materials are crucial for the successful package assembly and also important for the probing test.
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