S. Ueno, H. Furuta, Y. Okumura, T. Eimori, Y. Inoue
{"title":"新型低偏置电压二极管,采用非对称阈值电压单极管场效应晶体管,用于要求低电压工作的下一代器件","authors":"S. Ueno, H. Furuta, Y. Okumura, T. Eimori, Y. Inoue","doi":"10.1109/IEDM.2002.1175875","DOIUrl":null,"url":null,"abstract":"Novel diode with low offset voltage below 0.6V is proposed by using MONOS FET with asymmetric threshold voltage. Offset voltage of 0.3V can be achieved by suppressing off state current and reverse leakage current. This technique gives promising characteristics for next generation circuits with low voltage operation.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"55 1","pages":"449-452"},"PeriodicalIF":0.0000,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Novel low offset voltage diode using asymmetric threshold voltage MONOS-FET for next generation devices demanding low voltage operation\",\"authors\":\"S. Ueno, H. Furuta, Y. Okumura, T. Eimori, Y. Inoue\",\"doi\":\"10.1109/IEDM.2002.1175875\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Novel diode with low offset voltage below 0.6V is proposed by using MONOS FET with asymmetric threshold voltage. Offset voltage of 0.3V can be achieved by suppressing off state current and reverse leakage current. This technique gives promising characteristics for next generation circuits with low voltage operation.\",\"PeriodicalId\":74909,\"journal\":{\"name\":\"Technical digest. International Electron Devices Meeting\",\"volume\":\"55 1\",\"pages\":\"449-452\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-12-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Technical digest. International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2002.1175875\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Technical digest. International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2002.1175875","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Novel low offset voltage diode using asymmetric threshold voltage MONOS-FET for next generation devices demanding low voltage operation
Novel diode with low offset voltage below 0.6V is proposed by using MONOS FET with asymmetric threshold voltage. Offset voltage of 0.3V can be achieved by suppressing off state current and reverse leakage current. This technique gives promising characteristics for next generation circuits with low voltage operation.