{"title":"亚皮秒抖动SiGe BiCMOS发送和接收锁相环,用于12.5 Gbaud串行数据通信","authors":"D. Friedman, M. Meghelli, H. Ainspan, M. Soyuer","doi":"10.1109/VLSIC.2000.852870","DOIUrl":null,"url":null,"abstract":"Fully integrated SiGe BiCMOS transmit and receive PLLs for 8B/10B coded 10 Gb/s serial links operate with excellent jitter characteristics. The transmit PLL (TxPLL) provides a 12.5 GHz clock with 0.4 ps rms jitter synthesized from a /spl sim/195.3 MHz reference. The receive PLL (RxPLL), which exhibits <0.56 ps rms jitter generation, extracts a full rate clock and recovers data from a 12.5 Gb/s input bit stream. The RxPLL operates error-free when tested with a 14 km optical link test bench. The power consumption of the TxPLL and RxPLL cores at 3.3 V are 270 mW and 330 mW, respectively.","PeriodicalId":6361,"journal":{"name":"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)","volume":"32 1","pages":"132-135"},"PeriodicalIF":0.0000,"publicationDate":"2000-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Sub-picosecond jitter SiGe BiCMOS transmit and receive PLLs for 12.5 Gbaud serial data communication\",\"authors\":\"D. Friedman, M. Meghelli, H. Ainspan, M. Soyuer\",\"doi\":\"10.1109/VLSIC.2000.852870\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Fully integrated SiGe BiCMOS transmit and receive PLLs for 8B/10B coded 10 Gb/s serial links operate with excellent jitter characteristics. The transmit PLL (TxPLL) provides a 12.5 GHz clock with 0.4 ps rms jitter synthesized from a /spl sim/195.3 MHz reference. The receive PLL (RxPLL), which exhibits <0.56 ps rms jitter generation, extracts a full rate clock and recovers data from a 12.5 Gb/s input bit stream. The RxPLL operates error-free when tested with a 14 km optical link test bench. The power consumption of the TxPLL and RxPLL cores at 3.3 V are 270 mW and 330 mW, respectively.\",\"PeriodicalId\":6361,\"journal\":{\"name\":\"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)\",\"volume\":\"32 1\",\"pages\":\"132-135\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2000.852870\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2000.852870","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Sub-picosecond jitter SiGe BiCMOS transmit and receive PLLs for 12.5 Gbaud serial data communication
Fully integrated SiGe BiCMOS transmit and receive PLLs for 8B/10B coded 10 Gb/s serial links operate with excellent jitter characteristics. The transmit PLL (TxPLL) provides a 12.5 GHz clock with 0.4 ps rms jitter synthesized from a /spl sim/195.3 MHz reference. The receive PLL (RxPLL), which exhibits <0.56 ps rms jitter generation, extracts a full rate clock and recovers data from a 12.5 Gb/s input bit stream. The RxPLL operates error-free when tested with a 14 km optical link test bench. The power consumption of the TxPLL and RxPLL cores at 3.3 V are 270 mW and 330 mW, respectively.