Multi-objective Optimization for VLSI Circuits

Area, Speed and power are the basic design constraints which affects the performance of VLSI circuits. The main hurdle in the VLSI implementation of digital circuits is that either the design can be area efficient or power efficient or speed efficient; but not all area-time-speed efficient simultaneously. Optimizing one parameter affects the other. In this paper, an optimal multi-objective approach for VLSI implementation of digital circuit has been suggested; wherein digital low pass symmetric finite impulse response (FIR) filter has been selected as case study. Simulation results with gscl 45 nm tech file on Synopsis Design Vision Tool and Xilinx tool shows that the proposed modification in existing direct form FIR filter structure has reduced area up to 96.52 %, power by 97.44 % and can also improve the circuit latency (or speed) considerably, compared to the existing direct form digital FIR filter structure, and also modified direct form FIR filter structure is efficient than transposed direct form FIR filter structure.