{"title":"利用可重构性实现数字锁相环的低成本原位测试和监测","authors":"L. Yin, Peng Li","doi":"10.1145/1837274.1837507","DOIUrl":null,"url":null,"abstract":"We exploit the reconfigurability of recent all-digital PLL designs to provide novel in-situ output jitter test and diagnosis abilities under multiple parametric variations of key analog building blocks. Digital signatures are collected and processed under specifically designed loop filter configurations to facilitate low-cost high-accuracy performance prediction and diagnosis.","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"63 1","pages":"929-934"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Exploiting reconfigurability for low-cost in-situ test and monitoring of digital PLLs\",\"authors\":\"L. Yin, Peng Li\",\"doi\":\"10.1145/1837274.1837507\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We exploit the reconfigurability of recent all-digital PLL designs to provide novel in-situ output jitter test and diagnosis abilities under multiple parametric variations of key analog building blocks. Digital signatures are collected and processed under specifically designed loop filter configurations to facilitate low-cost high-accuracy performance prediction and diagnosis.\",\"PeriodicalId\":87346,\"journal\":{\"name\":\"Proceedings. Design Automation Conference\",\"volume\":\"63 1\",\"pages\":\"929-934\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-06-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. Design Automation Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/1837274.1837507\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1837274.1837507","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Exploiting reconfigurability for low-cost in-situ test and monitoring of digital PLLs
We exploit the reconfigurability of recent all-digital PLL designs to provide novel in-situ output jitter test and diagnosis abilities under multiple parametric variations of key analog building blocks. Digital signatures are collected and processed under specifically designed loop filter configurations to facilitate low-cost high-accuracy performance prediction and diagnosis.