在标准CMOS中记录Q螺旋电感

L. Tiemeijer, D. Leenaerts, N. Pavlovic, R. Havens
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引用次数: 36

摘要

无论是在薄膜技术中作为分立元件实现,还是在IC工艺中作为集成元件实现,高q螺旋电感都是实现VCO和LNA等关键射频电路所必需的。我们首次证明,通过将螺旋电感分为四个电阻相等的并联电流路径,可以抑制电感电流拥挤,从而使标准CMOS中的2 GHz 5 nH电感的Q值达到创纪录的15,比以前的技术提高了40%。提出的并行电流路径划分可以在不修改工艺的情况下实现,减少CMP碟形,并有望在质量因子Q和电感面积方面提供更大的性能提升,用于采用更厚的金属层和低k材料的IC和薄膜工艺。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Record Q spiral inductors in standard CMOS
High-Q spiral inductors, either realized as discrete elements in thin-film technologies, or as integrated components in IC processes, are essential to realize key RF circuitry like VCO's and LNA's. We have demonstrated for the first time that by dividing a spiral inductor into four parallel current paths of equal resistance and inductance current crowding can be suppressed, allowing a record Q of 15 for a 2 GHz 5 nH inductor in standard CMOS, representing a 40 % improvement over previous art. The proposed division into parallel current paths can be realized without process modifications, reduces CMP dishing, and is expected to provide even larger performance gains in terms of quality factor Q and inductor area for IC and thin-film processes employing thicker metal layers and low-K materials.
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