基于谐波去除的新正弦近似DDFS

IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems Pub Date : 2009-05-24 DOI:10.1109/ISCAS.2009.5118114

iroomi

{"title":"基于谐波去除的新正弦近似DDFS","authors":"iroomi","doi":"10.1109/ISCAS.2009.5118114","DOIUrl":null,"url":null,"abstract":"This paper proposes a new sine wave approximation method and the proposed method is used as the phase amplitude converter of direct digital frequency synthesizer (DDFS). As the circuit size of the proposed method grows exponentially in proportion to the purity of the generated signal, an error compensation ROM is combined to improve the signal purity while keeping the circuit size small. VHDL simulations are conducted to test the DDFS and the results show that the circuit size of the proposed DDFS is about 40% smaller than that of the conventional DDFS.","PeriodicalId":91083,"journal":{"name":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","volume":"1955 1","pages":"1751-1754"},"PeriodicalIF":0.0000,"publicationDate":"2009-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"DDFS with new sinusoid approximation based on harmonics removal\",\"authors\":\"iroomi\",\"doi\":\"10.1109/ISCAS.2009.5118114\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a new sine wave approximation method and the proposed method is used as the phase amplitude converter of direct digital frequency synthesizer (DDFS). As the circuit size of the proposed method grows exponentially in proportion to the purity of the generated signal, an error compensation ROM is combined to improve the signal purity while keeping the circuit size small. VHDL simulations are conducted to test the DDFS and the results show that the circuit size of the proposed DDFS is about 40% smaller than that of the conventional DDFS.\",\"PeriodicalId\":91083,\"journal\":{\"name\":\"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems\",\"volume\":\"1955 1\",\"pages\":\"1751-1754\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-05-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.2009.5118114\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2009.5118114","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 2

摘要

本文提出了一种新的正弦波近似方法，并将该方法用于直接数字频率合成器(DDFS)的相位变换器。由于该方法的电路尺寸与生成信号的纯度成指数比例增长，因此结合了误差补偿ROM以提高信号纯度，同时保持电路尺寸小。通过VHDL仿真对所设计的DDFS进行了测试，结果表明所设计的DDFS电路尺寸比传统DDFS小40%左右。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

DDFS with new sinusoid approximation based on harmonics removal

This paper proposes a new sine wave approximation method and the proposed method is used as the phase amplitude converter of direct digital frequency synthesizer (DDFS). As the circuit size of the proposed method grows exponentially in proportion to the purity of the generated signal, an error compensation ROM is combined to improve the signal purity while keeping the circuit size small. VHDL simulations are conducted to test the DDFS and the results show that the circuit size of the proposed DDFS is about 40% smaller than that of the conventional DDFS.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems

CiteScore

2.00

自引率

0.00%

发文量