2.5D封装中电迁移的评估

Jiefeng Xu, S. McCann, Huayan Wang, Jing Wang, Van-Lai Pham, S. Cain, G. Refai-Ahmed, S.B. Park
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引用次数: 6

摘要

在这项研究中,进行了加速电迁移(EM)试验。试验车辆有四种常见的互联结构。第一种是经典的球栅阵列(BGA),简称BGA;第二种是顶部有铜孔的焊料球,简称BGA-Via;第三种是衬底中的单个铜通孔,简称via;最后一个是单独的镀铜通孔(PTH),简称PTH在衬底。每个结构周围的内置蛇形铜细线被设计用来监测当地的温度。所有试验车辆均在150℃温度和12A电流下受力。现场记录了各测试结构的电压和蛇形线的电阻。结果表明,不同的微电结构对电磁行为有很大的影响,尤其是失效时间(TTF)。在BGA测试结构中,失效发生在焊球基板侧;在BGA-Via中,失败的原因是铜孔的损耗。在过孔和PTH测试结构中没有观察到故障,即使经过极长时间的测试,尽管它们具有更高的封装温度。BGA- via的TTF比BGA短约2倍。采用基于原子通量散度(AFD)的有限元模拟,了解了失效机理,并对TTF进行了预测。结果表明,在焊锡球上加通孔比在焊锡球上加通孔产生的电流密度高10%。当焊锡球孔下方的空隙成核时,电流密度开始重新分布并减小。简而言之,当Via靠近焊料球时,它是EM最危险的点。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An Assessment of Electromigration in 2.5D Packaging
In this study, an accelerated Electromigration (EM) test was performed. The test vehicle has four types of common interconnect structure. The first one is a classic Ball Grid Array (BGA), short for BGA; the second one is a solder ball with a copper via on top, short for BGA-Via; the third one is an individual copper via in the substrate, short for Via; the last one is an individual copper Plated Through Hole (PTH), short for PTH in the substrate. The built-in serpentine copper fine lines around each structure were designed to monitor the local temperature in-situ. All test vehicles were stressed at 150oC temperature with 12A current. The voltage of each test structure and the resistance of the serpentine line were recorded in-situ. The results show that different micro-electrical structures have great effects on EM behavior, especially the time to failure (TTF). In BGA test structure, the failure occurred on the substrate side of solder ball; in BGA-Via, the failure was the depletion of the copper via. No failure was observed in Via and PTH test structures, even after an extremely long testing, although they have higher package temperature. The TTF of BGA-Via is about 2 times shorter than BGA. A finite element simulation based on Atom Flux Divergence (AFD) was performed to understand the failure mechanism and predict the TTF. The results show that via on top of solder ball will cause 10% higher current density than solder ball only. When the void underneath of the via in solder ball was nucleated, the current density will start to redistribute and reduce. In short, Via is the riskiest point for EM when it located near the solder ball.
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