{"title":"sige130 -nm硅光子学环调制器40gbps驱动IC的实现与设计研究","authors":"A. Fatemi, H. Klar, F. Gerfers","doi":"10.1109/ISCAS.2016.7539072","DOIUrl":null,"url":null,"abstract":"This paper presents a 40 Gbps micro-ring modulator driver which is designed in 130-nm SiGe technology. The proposed driver IC is optimized for a 2 Vppd output signal swing required for the optical modulator or 1 Vppd if terminated by 50 ohm. The power consumption is only 90 mW operated from a 2.5 V supply voltage. The inductor-less driver architecture consists of a fix-biased cascode topology with capacitive degeneration to improve the bandwidth and output voltage swing while minimizing the number of buffer stage to save power. The silicon area efficient driver occupies only 0.04 mm2. Simulation results exhibit a differential gain of 16 dB over 35 GHz. To the best knowledge of the authors, this driver represents the fastest micro-ring modulator driver IC with low transmitter FOM of only 1.12 pJ/(bit*V).","PeriodicalId":6546,"journal":{"name":"2016 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"140 1","pages":"2387-2390"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Implementation and design investigation of 40 Gbps driver IC for silicon photonics ring-modulator in SiGe 130-nm\",\"authors\":\"A. Fatemi, H. Klar, F. Gerfers\",\"doi\":\"10.1109/ISCAS.2016.7539072\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a 40 Gbps micro-ring modulator driver which is designed in 130-nm SiGe technology. The proposed driver IC is optimized for a 2 Vppd output signal swing required for the optical modulator or 1 Vppd if terminated by 50 ohm. The power consumption is only 90 mW operated from a 2.5 V supply voltage. The inductor-less driver architecture consists of a fix-biased cascode topology with capacitive degeneration to improve the bandwidth and output voltage swing while minimizing the number of buffer stage to save power. The silicon area efficient driver occupies only 0.04 mm2. Simulation results exhibit a differential gain of 16 dB over 35 GHz. To the best knowledge of the authors, this driver represents the fastest micro-ring modulator driver IC with low transmitter FOM of only 1.12 pJ/(bit*V).\",\"PeriodicalId\":6546,\"journal\":{\"name\":\"2016 IEEE International Symposium on Circuits and Systems (ISCAS)\",\"volume\":\"140 1\",\"pages\":\"2387-2390\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE International Symposium on Circuits and Systems (ISCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.2016.7539072\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Symposium on Circuits and Systems (ISCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2016.7539072","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Implementation and design investigation of 40 Gbps driver IC for silicon photonics ring-modulator in SiGe 130-nm
This paper presents a 40 Gbps micro-ring modulator driver which is designed in 130-nm SiGe technology. The proposed driver IC is optimized for a 2 Vppd output signal swing required for the optical modulator or 1 Vppd if terminated by 50 ohm. The power consumption is only 90 mW operated from a 2.5 V supply voltage. The inductor-less driver architecture consists of a fix-biased cascode topology with capacitive degeneration to improve the bandwidth and output voltage swing while minimizing the number of buffer stage to save power. The silicon area efficient driver occupies only 0.04 mm2. Simulation results exhibit a differential gain of 16 dB over 35 GHz. To the best knowledge of the authors, this driver represents the fastest micro-ring modulator driver IC with low transmitter FOM of only 1.12 pJ/(bit*V).