H. Seidl, M. Gutsche, U. Schroeder, A. Birner, T. Hecht, S. Jakschik, J. Luetzen, M. Kerber, S. Kudelka, T. Popp, A. Orth, H. Reisinger, A. Saenger, K. Schupke, B. Sell
{"title":"一种用于亚100纳米技术的完全集成的Al2O3沟槽电容DRAM","authors":"H. Seidl, M. Gutsche, U. Schroeder, A. Birner, T. Hecht, S. Jakschik, J. Luetzen, M. Kerber, S. Kudelka, T. Popp, A. Orth, H. Reisinger, A. Saenger, K. Schupke, B. Sell","doi":"10.1109/IEDM.2002.1175968","DOIUrl":null,"url":null,"abstract":"For the first time, fully integrated 128 Mb trench DRAMs using Al/sub 2/O/sub 3/ as high-k node dielectric in silicon-insulator-silicon (SIS) capacitors were successfully fabricated. A highly manufacturable integration scheme for Al/sub 2/O/sub 3/ as node dielectric in trench capacitors was developed and successfully implemented in a 170 nm ground rule technology. A capacitance close to 50 fF/cell with leakage current well below 1 fA/cell was achieved, leading to significantly improved retention characteristics. 128 Mb DRAM devices with full functionality and excellent test yields were obtained. The scalability of this technology to smaller dimensions is demonstrated by the integration of ALD (Atomic Layer Deposition) Al/sub 2/O/sub 3/ into 110 nm ground rule trench capacitors. In addition, trench capacitors with Al/sub 2/O/sub 3/ on hemispherical grain (HSG) silicon were fabricated, exhibiting high capacitance enhancement with low leakage current.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"33 1","pages":"839-842"},"PeriodicalIF":0.0000,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":"{\"title\":\"A fully integrated Al2O3 trench capacitor DRAM for sub-100 nm technology\",\"authors\":\"H. Seidl, M. Gutsche, U. Schroeder, A. Birner, T. Hecht, S. Jakschik, J. Luetzen, M. Kerber, S. Kudelka, T. Popp, A. Orth, H. Reisinger, A. Saenger, K. Schupke, B. Sell\",\"doi\":\"10.1109/IEDM.2002.1175968\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For the first time, fully integrated 128 Mb trench DRAMs using Al/sub 2/O/sub 3/ as high-k node dielectric in silicon-insulator-silicon (SIS) capacitors were successfully fabricated. A highly manufacturable integration scheme for Al/sub 2/O/sub 3/ as node dielectric in trench capacitors was developed and successfully implemented in a 170 nm ground rule technology. A capacitance close to 50 fF/cell with leakage current well below 1 fA/cell was achieved, leading to significantly improved retention characteristics. 128 Mb DRAM devices with full functionality and excellent test yields were obtained. The scalability of this technology to smaller dimensions is demonstrated by the integration of ALD (Atomic Layer Deposition) Al/sub 2/O/sub 3/ into 110 nm ground rule trench capacitors. In addition, trench capacitors with Al/sub 2/O/sub 3/ on hemispherical grain (HSG) silicon were fabricated, exhibiting high capacitance enhancement with low leakage current.\",\"PeriodicalId\":74909,\"journal\":{\"name\":\"Technical digest. International Electron Devices Meeting\",\"volume\":\"33 1\",\"pages\":\"839-842\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-12-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"17\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Technical digest. International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2002.1175968\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Technical digest. International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2002.1175968","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A fully integrated Al2O3 trench capacitor DRAM for sub-100 nm technology
For the first time, fully integrated 128 Mb trench DRAMs using Al/sub 2/O/sub 3/ as high-k node dielectric in silicon-insulator-silicon (SIS) capacitors were successfully fabricated. A highly manufacturable integration scheme for Al/sub 2/O/sub 3/ as node dielectric in trench capacitors was developed and successfully implemented in a 170 nm ground rule technology. A capacitance close to 50 fF/cell with leakage current well below 1 fA/cell was achieved, leading to significantly improved retention characteristics. 128 Mb DRAM devices with full functionality and excellent test yields were obtained. The scalability of this technology to smaller dimensions is demonstrated by the integration of ALD (Atomic Layer Deposition) Al/sub 2/O/sub 3/ into 110 nm ground rule trench capacitors. In addition, trench capacitors with Al/sub 2/O/sub 3/ on hemispherical grain (HSG) silicon were fabricated, exhibiting high capacitance enhancement with low leakage current.
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