封装对1.2 kV SiC模块模拟性能的影响

Zichen Miao, Yincan Mao, K. Ngo, Woochan Kim
{"title":"封装对1.2 kV SiC模块模拟性能的影响","authors":"Zichen Miao, Yincan Mao, K. Ngo, Woochan Kim","doi":"10.1109/WIPDA.2015.7369301","DOIUrl":null,"url":null,"abstract":"Power modules with well-behaved terminal waveforms could still have their dice suffering from false triggering. Immunities to false triggering and current unbalance, and switching energy of four commercial 1.2 kV SiC modules (modules A, B, C, and D) are compared by studying the simulated channel current of each MOSFET die in the presence of packages' parasitic impedances. For module B, gate inductance and Kelvin-source inductance of the low-side switch reaches 111 nH and 103 nH, respectively, and 15 Ω gate resistor is added inside the module to mitigate the false triggering. For modules A, B, and C, cross(talk-induced) turn-on are noticed internally even though terminal waveforms look normal. Module C switches with severe current unbalance and cross-turn-on because of asymmetry in the layout of its power loop. Module D's symmetrical layout suppresses current unbalance and cross-turn-on at the expense of switching energy, which is the largest among the modules.","PeriodicalId":6538,"journal":{"name":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","volume":"36 1","pages":"306-311"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Package influence on the simulated performance of 1.2 kV SiC modules\",\"authors\":\"Zichen Miao, Yincan Mao, K. Ngo, Woochan Kim\",\"doi\":\"10.1109/WIPDA.2015.7369301\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Power modules with well-behaved terminal waveforms could still have their dice suffering from false triggering. Immunities to false triggering and current unbalance, and switching energy of four commercial 1.2 kV SiC modules (modules A, B, C, and D) are compared by studying the simulated channel current of each MOSFET die in the presence of packages' parasitic impedances. For module B, gate inductance and Kelvin-source inductance of the low-side switch reaches 111 nH and 103 nH, respectively, and 15 Ω gate resistor is added inside the module to mitigate the false triggering. For modules A, B, and C, cross(talk-induced) turn-on are noticed internally even though terminal waveforms look normal. Module C switches with severe current unbalance and cross-turn-on because of asymmetry in the layout of its power loop. Module D's symmetrical layout suppresses current unbalance and cross-turn-on at the expense of switching energy, which is the largest among the modules.\",\"PeriodicalId\":6538,\"journal\":{\"name\":\"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)\",\"volume\":\"36 1\",\"pages\":\"306-311\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/WIPDA.2015.7369301\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WIPDA.2015.7369301","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9

摘要

具有良好终端波形的电源模块仍然可能受到误触发的影响。通过研究在封装存在寄生阻抗的情况下每个MOSFET芯片的模拟通道电流,比较了4个商用1.2 kV SiC模块(模块A、B、C和D)对误触发和电流不平衡的抗扰度以及开关能量。对于模块B,低侧开关的门电感和开尔文源电感分别达到111 nH和103 nH,模块内部增加15 Ω门电阻以减轻误触发。对于模块A, B和C,即使终端波形看起来正常,内部也会注意到交叉(通话诱导)导通。模块C由于其电源回路布局不对称,导致开关电流严重不平衡和交叉导通。模块D的对称布局以牺牲开关能量为代价抑制了电流不平衡和交叉导通,是各模块中最大的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Package influence on the simulated performance of 1.2 kV SiC modules
Power modules with well-behaved terminal waveforms could still have their dice suffering from false triggering. Immunities to false triggering and current unbalance, and switching energy of four commercial 1.2 kV SiC modules (modules A, B, C, and D) are compared by studying the simulated channel current of each MOSFET die in the presence of packages' parasitic impedances. For module B, gate inductance and Kelvin-source inductance of the low-side switch reaches 111 nH and 103 nH, respectively, and 15 Ω gate resistor is added inside the module to mitigate the false triggering. For modules A, B, and C, cross(talk-induced) turn-on are noticed internally even though terminal waveforms look normal. Module C switches with severe current unbalance and cross-turn-on because of asymmetry in the layout of its power loop. Module D's symmetrical layout suppresses current unbalance and cross-turn-on at the expense of switching energy, which is the largest among the modules.
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