{"title":"电子封装用导电胶膜(ACFs和nfc)材料","authors":"K. Paik","doi":"10.23919/PANPACIFIC.2019.8696878","DOIUrl":null,"url":null,"abstract":"Due to the increasing demand for higher performance, greater flexibility, smaller size, and lighter weight in mobile and wearable electronic products, there have been growing needs of various electronic packaging products and fine-pitch interconnection technologies. To realize various state-of-art mobile and wearable electronic products, fine pitch and flexible packaging & interconnection technologies are needed. As one of the promising fine pitch and flexible packaging and interconnection technologies, conductive adhesive films materials such as ACFs(Anisotropic Conductive Films) and NCFs(Non Conductive Films) are widely used now.In general, ACFs have two technical limitations such as (1) ultra-fine pitch shortage free interconnection and (2) higher current handling capability. For (1) ultra-fine pitch applications without electrical shortage, new concept of Nano-fiber ACFs and APL(Anchoring Polymer Layer) ACFs have been successfully invented by KAIST both for less than 20 micron pitch COG(Chip On Glass), COP(Chip On Polymer). and COF(Chip On Flex). And they can be also used for less than 50 micron pitch FOF(Flex On Flex) and FOB(Flex On Board) applications. In addition, for (2) higher current handling capability applications, new solder ACFs have been also introduced by KAIST to replace the conventional metal particles based ACFs interconnection. By solder ACFs, 30% low contact resistance, 4 X higher current handling capability, and excellent reliability were successfully achieved compared with conventional ACFs. Furthermore, ACFs materials-based packaging and interconnection method can provide the flexible interconnect solution for OLED(Organic LED) COP and COF/CIF(Chip In Flex) packages to realize wearable electronic products.Recently the 3-D die chip stacking using the Through silicon via (TSV) technology has been widely used for stacking memory and ASIC chips. In the 3D-TSV vertical interconnection, Cu pillar/Sn-Ag eutectic solder bump is one of the promising bonding method. After the 3D-TSV chips are interconnected with the bumps, the gap between stacked chips should be filled with underfill materials. However, capillary flow underfill between 3D-TSV stacked chips become difficult because of increased chip/wafer area, decreased gap height, and multiple chip/wafer stacking. Therefore, new bonding method using NCFs materials, which performs both Cu-pillar/Sn-Ag flip chip bump to metal pads interconnection and underfils at the same time has been extensively used.In this presentation, the ACFs materials for ultra-fine pitch and higher current carrying interconnection and the NCFs for 3D-TSV chip stacking applications will be introduced.","PeriodicalId":6747,"journal":{"name":"2019 Pan Pacific Microelectronics Symposium (Pan Pacific)","volume":"15 1","pages":"1-5"},"PeriodicalIF":0.0000,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Conductive Adhesive Films (ACFs and NCFs) Materials For Electronics Packaging Applications\",\"authors\":\"K. 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For (1) ultra-fine pitch applications without electrical shortage, new concept of Nano-fiber ACFs and APL(Anchoring Polymer Layer) ACFs have been successfully invented by KAIST both for less than 20 micron pitch COG(Chip On Glass), COP(Chip On Polymer). and COF(Chip On Flex). And they can be also used for less than 50 micron pitch FOF(Flex On Flex) and FOB(Flex On Board) applications. In addition, for (2) higher current handling capability applications, new solder ACFs have been also introduced by KAIST to replace the conventional metal particles based ACFs interconnection. By solder ACFs, 30% low contact resistance, 4 X higher current handling capability, and excellent reliability were successfully achieved compared with conventional ACFs. Furthermore, ACFs materials-based packaging and interconnection method can provide the flexible interconnect solution for OLED(Organic LED) COP and COF/CIF(Chip In Flex) packages to realize wearable electronic products.Recently the 3-D die chip stacking using the Through silicon via (TSV) technology has been widely used for stacking memory and ASIC chips. In the 3D-TSV vertical interconnection, Cu pillar/Sn-Ag eutectic solder bump is one of the promising bonding method. After the 3D-TSV chips are interconnected with the bumps, the gap between stacked chips should be filled with underfill materials. However, capillary flow underfill between 3D-TSV stacked chips become difficult because of increased chip/wafer area, decreased gap height, and multiple chip/wafer stacking. Therefore, new bonding method using NCFs materials, which performs both Cu-pillar/Sn-Ag flip chip bump to metal pads interconnection and underfils at the same time has been extensively used.In this presentation, the ACFs materials for ultra-fine pitch and higher current carrying interconnection and the NCFs for 3D-TSV chip stacking applications will be introduced.\",\"PeriodicalId\":6747,\"journal\":{\"name\":\"2019 Pan Pacific Microelectronics Symposium (Pan Pacific)\",\"volume\":\"15 1\",\"pages\":\"1-5\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 Pan Pacific Microelectronics Symposium (Pan Pacific)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/PANPACIFIC.2019.8696878\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 Pan Pacific Microelectronics Symposium (Pan Pacific)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/PANPACIFIC.2019.8696878","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
摘要
由于移动和可穿戴电子产品对更高的性能、更大的灵活性、更小的尺寸和更轻的重量的需求不断增加,各种电子封装产品和细间距互连技术的需求不断增长。为了实现各种先进的移动和可穿戴电子产品,需要精细间距和柔性封装与互连技术。各向异性导电薄膜(ACFs)和非导电薄膜(nfc)等导电胶粘膜材料作为一种极具发展前景的细间距柔性封装和互连技术,目前得到了广泛的应用。一般来说,ACFs有两个技术限制,即(1)超细间距无短缺互连和(2)更高的电流处理能力。对于(1)无电短缺的超细间距应用,KAIST成功发明了纳米纤维ACFs和APL(锚定聚合物层)ACFs的新概念,两者均用于小于20微米间距的COG(Chip On Glass), COP(Chip On Polymer)。和COF(Chip On Flex)。它们也可用于小于50微米间距的FOF(Flex On Flex)和FOB(Flex On Board)应用。此外,对于(2)更高电流处理能力的应用,KAIST还引入了新的焊料ACFs来取代传统的基于金属颗粒的ACFs互连。通过焊料ACFs,与传统ACFs相比,其接触电阻降低30%,电流处理能力提高4倍,可靠性优异。此外,ACFs基于材料的封装互连方法可以为OLED(Organic LED) COP和COF/CIF(Chip In Flex)封装提供柔性互连解决方案,实现可穿戴电子产品。近年来,采用透硅通孔(TSV)技术的三维芯片堆叠技术已广泛应用于存储芯片和ASIC芯片的堆叠。在3D-TSV垂直互连中,铜柱/Sn-Ag共晶凸点焊是一种很有前途的连接方法。3D-TSV芯片与凸起物互连后,堆叠芯片之间的间隙应用底料填充。然而,由于芯片/晶圆面积的增加、间隙高度的降低以及多个芯片/晶圆的堆叠,3D-TSV堆叠芯片之间的毛细管流动下填充变得困难。因此,利用nfc材料实现铜柱/Sn-Ag倒装芯片与金属衬垫互连并同时实现下填充的新型键合方法已得到广泛应用。本报告将介绍用于超细间距和高载流互连的ACFs材料以及用于3D-TSV芯片堆叠应用的nfc材料。
Conductive Adhesive Films (ACFs and NCFs) Materials For Electronics Packaging Applications
Due to the increasing demand for higher performance, greater flexibility, smaller size, and lighter weight in mobile and wearable electronic products, there have been growing needs of various electronic packaging products and fine-pitch interconnection technologies. To realize various state-of-art mobile and wearable electronic products, fine pitch and flexible packaging & interconnection technologies are needed. As one of the promising fine pitch and flexible packaging and interconnection technologies, conductive adhesive films materials such as ACFs(Anisotropic Conductive Films) and NCFs(Non Conductive Films) are widely used now.In general, ACFs have two technical limitations such as (1) ultra-fine pitch shortage free interconnection and (2) higher current handling capability. For (1) ultra-fine pitch applications without electrical shortage, new concept of Nano-fiber ACFs and APL(Anchoring Polymer Layer) ACFs have been successfully invented by KAIST both for less than 20 micron pitch COG(Chip On Glass), COP(Chip On Polymer). and COF(Chip On Flex). And they can be also used for less than 50 micron pitch FOF(Flex On Flex) and FOB(Flex On Board) applications. In addition, for (2) higher current handling capability applications, new solder ACFs have been also introduced by KAIST to replace the conventional metal particles based ACFs interconnection. By solder ACFs, 30% low contact resistance, 4 X higher current handling capability, and excellent reliability were successfully achieved compared with conventional ACFs. Furthermore, ACFs materials-based packaging and interconnection method can provide the flexible interconnect solution for OLED(Organic LED) COP and COF/CIF(Chip In Flex) packages to realize wearable electronic products.Recently the 3-D die chip stacking using the Through silicon via (TSV) technology has been widely used for stacking memory and ASIC chips. In the 3D-TSV vertical interconnection, Cu pillar/Sn-Ag eutectic solder bump is one of the promising bonding method. After the 3D-TSV chips are interconnected with the bumps, the gap between stacked chips should be filled with underfill materials. However, capillary flow underfill between 3D-TSV stacked chips become difficult because of increased chip/wafer area, decreased gap height, and multiple chip/wafer stacking. Therefore, new bonding method using NCFs materials, which performs both Cu-pillar/Sn-Ag flip chip bump to metal pads interconnection and underfils at the same time has been extensively used.In this presentation, the ACFs materials for ultra-fine pitch and higher current carrying interconnection and the NCFs for 3D-TSV chip stacking applications will be introduced.