RAMP gold:用于多处理器的基于fpga的架构模拟器

Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yunsup Lee, Henry Cook, D. Patterson, K. Asanović
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引用次数: 135

摘要

我们提出了一种经济的基于fpga的架构模拟器RAMP Gold,它允许对多核心系统进行快速的早期设计空间探索。RAMP Gold原型是一个高吞吐量,周期精确的全系统模拟器,运行在单个Xilinx Virtex-5 FPGA板上,并模拟能够启动真实操作系统的64核共享内存目标机。为了提高FPGA的实现效率,将功能和时序分开建模,并在两个模型中使用主机多线程。我们使用在我们的多核研究操作系统上运行的现代并行基准套件来评估原型的性能,与广泛使用的基于软件的架构模拟器相比,实现了两个数量级的加速。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
RAMP gold: An FPGA-based architecture simulator for multiprocessors
We present RAMP Gold, an economical FPGA-based architecture simulator that allows rapid early design-space exploration of manycore systems. The RAMP Gold prototype is a high-throughput, cycle-accurate full-system simulator that runs on a single Xilinx Virtex-5 FPGA board, and which simulates a 64-core shared-memory target machine capable of booting real operating systems. To improve FPGA implementation efficiency, functionality and timing are modeled separately and host multithreading is used in both models. We evaluate the prototype's performance using a modern parallel benchmark suite running on our manycore research operating system, achieving two orders of magnitude speedup compared to a widely-used software-based architecture simulator.
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