等离子体掺杂(PLAD)在先进存储器件制造中的应用

S. Qin
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引用次数: 1

摘要

PLAD(等离子体掺杂)由于其独特的优势,可以克服或最大限度地减少基于束线(BL)的植入物的许多问题,因此有望成为进化和革命性的掺杂选择。在这次演讲中,我将介绍PLAD在平面和非平面3D器件结构上的发展。与传统的BL植入物相比,PLAD不仅产量显著提高,而且器件性能和3D结构掺杂能力也有显著提高,包括接触电阻降低80%,平面器件驱动电流增加25%以上,串联电阻降低23%,非平面3D器件驱动电流增加25%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Plasma doping (PLAD) for advanced memory device manufacturing
PLAD (plasma doping) is promising for both evolutionary and revolutionary doping options because of its unique advantages which can overcome or minimize many of the issues of the beam-line (BL) based implants. In this talk, I present developments of PLAD on both planar and non-planar 3D device structures. Comparing with the conventional BL implants, PLAD shows not only a significant production enhancement, but also a significant device performance improvement and 3D structure doping capability, including an 80% contact resistance reduction, more than 25% drive current increase on planar devices, and 23% series resistance reduction, 25% drive current increase on non-planar 3D devices.
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