3d序列集成带来的机遇与挑战

2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI:10.1109/IITC51362.2021.9537356

P. Batude, L. Brunet, C. Fenouillet-Béranger, D. Lattard, F. Andrieu, M. Vinet, L. Brevard, M. Ribotta, B. Previtali, C. Tabone, F. Ponthenier, N. Rambal, P. Sideris, X. Garros, M. Cassé, C. Theodorou, B. Sklénard, J. Lacord, P. Besson, F. Fournel, S. Kerdilès, P. Acosta-Alba, V. Mazzocchi, J. Hartmann, F. Mazen, S. Thuries, O. Billoint, P. Vivet, G. Sicard, G. Cibrario, M. Mouhdach, B. Giraud, CM. Ribotta, V. Lapras

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引用次数: 1

摘要

本文的目的是介绍三维序列集成及其主要的应用前景。该演讲还将简要介绍构建高性能Si CMOS所需的所有关键使能工艺步骤，这些步骤由3d序列集成，热预算保持有源器件和互连的完整性，并将概述当前低温器件性能的现状和前景。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Opportunities and challenges brought by 3D-sequential integration

The aim of this paper is to present the 3D-sequential integration and its main prospective application sectors. The presentation will also give a synoptic view of all the key enabling process steps required to build high performance Si CMOS integrated by 3D-sequential with thermal budget preserving the integrity of active devices and interconnects and will sketch a status and prospect on current low temperature device performance.

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2021 IEEE International Interconnect Technology Conference (IITC)

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