一种新的三维集成电路制造技术，堆叠薄膜双cmos层

International Electron Devices Meeting 1991 [Technical Digest] Pub Date : 1991-12-08 DOI:10.1109/IEDM.1991.235336

Y. Hayashi, K. Oyama, S. Takahashi, S. Wada, K. Kajiyana, R. Koh, T. Kunio

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引用次数: 16

摘要

提出了一种将双有源器件层(DUAL) CMOS集成电路的电功能块进行累积键合的新型三维集成电路。在双cmos集成电路中，采用激光束退火技术将pmosfet堆叠在nmosfet上。通过机械化学抛光，IC衬底变薄，然后连接在一起。确认了堆叠在三维集成电路中的逆变器和环形振荡器等功能模块的运行。

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A new three dimensional IC fabrication technology, stacking thin film DUAL-CMOS layers

A novel 3-D IC has been developed in which electrical function blocks of thin-film dual-active-device-layer (DUAL) CMOS ICs are bonded cumulatively. In the DUAL-CMOS ICs, pMOSFETs are stacked on nMOSFETs by using a laser beam annealing technique. By mechano-chemical polishing, the IC substrates are thinned, and then joined together. Operation of function blocks such as an inverter and ring oscillator stacked in the 3-D IC is confirmed.<>

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来源期刊

International Electron Devices Meeting 1991 [Technical Digest]

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