T. Ishikawa, D. Kodama, Y. Matsui, M. Hiratani, T. Furusawa, D. Hisamoto
{"title":"高电容Cu/Ta2O5/Cu MIM结构,用于SoC应用,具有单掩模附加工艺","authors":"T. Ishikawa, D. Kodama, Y. Matsui, M. Hiratani, T. Furusawa, D. Hisamoto","doi":"10.1109/IEDM.2002.1175991","DOIUrl":null,"url":null,"abstract":"This paper presents a metal-insulator-metal capacitor for SoC applications which has the highest capacitance density (up to 12 fF//spl mu/m/sup 2/) ever reported for a device in this field. The simple MIM structure allowed development of the process as a single-mask add-on to conventional Cu BEOL processing.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"33 1","pages":"940-942"},"PeriodicalIF":0.0000,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"48","resultStr":"{\"title\":\"High-capacitance Cu/Ta2O5/Cu MIM structure for SoC applications featuring a single-mask add-on process\",\"authors\":\"T. Ishikawa, D. Kodama, Y. Matsui, M. Hiratani, T. Furusawa, D. Hisamoto\",\"doi\":\"10.1109/IEDM.2002.1175991\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a metal-insulator-metal capacitor for SoC applications which has the highest capacitance density (up to 12 fF//spl mu/m/sup 2/) ever reported for a device in this field. The simple MIM structure allowed development of the process as a single-mask add-on to conventional Cu BEOL processing.\",\"PeriodicalId\":74909,\"journal\":{\"name\":\"Technical digest. International Electron Devices Meeting\",\"volume\":\"33 1\",\"pages\":\"940-942\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-12-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"48\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Technical digest. International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2002.1175991\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Technical digest. International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2002.1175991","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High-capacitance Cu/Ta2O5/Cu MIM structure for SoC applications featuring a single-mask add-on process
This paper presents a metal-insulator-metal capacitor for SoC applications which has the highest capacitance density (up to 12 fF//spl mu/m/sup 2/) ever reported for a device in this field. The simple MIM structure allowed development of the process as a single-mask add-on to conventional Cu BEOL processing.