28nm FD-SOI技术在低至100mK低温下的量子计算变异性评估

B. C. Paz, L. L. Guevel, M. Cassé, G. Billiot, G. Pillonnet, A. Jansen, R. Maurand, S. Haendler, A. Juge, E. Vincent, P. Galy, G. Ghibaudo, M. Vinet, S. de Franceschi, T. Meunier, F. Gaillard
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引用次数: 21

摘要

28nm FD-SOI晶体管的可变性首次被评估到超低温(UL T),在T= 100mk。对于短通道晶体管,在UL T下实现了高性能,$\mathrm{I}_{\mathrm{ON}} > 1\mathrm{mA}\mu \mathrm{m}$和$\mathrm{I}_{\mathrm{OFF}}$低于设备精度<1 fA,特别是通过保持前向后偏置(FBB)的优势,在室温(R T)低至100mK时具有相同的效率。研究了在ULT下MOSFET失配的物理根源,强调了电荷波动增加对阈值电压$(\mathrm{V}_{\mathrm{TH}})$和电流增益因子$(\beta)$变化的影响。除此之外,我们证明了在低温下$\mathrm{V}_{\mathrm{TH}}$和$\beta$变化率的增加与RT值和其他CMOS技术相比仍然相当低,因此它应该不会对该温度范围内的电路工作有害。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Variability Evaluation of 28nm FD-SOI Technology at Cryogenic Temperatures down to 100mK for Quantum Computing
Variability of28nm FD-SOI transistors is evaluated for the first time down to ultra low temperatures (UL T), at T= 1 00mK. High performance is achieved at UL T for short channel transistors, with $\mathrm{I}_{\mathrm{ON}} > 1\mathrm{mA}\mu \mathrm{m}$ and $\mathrm{I}_{\mathrm{OFF}}$ below the equipment accuracy <1 fA, in particular by keeping advantage of forward back biasing (FBB), with the same efficiency from room temperature (R T) down to 100mK. The physical origins of MOSFET mismatch at ULT are studied, highlighting the impact of the charge fluctuations increase on both threshold voltage $(\mathrm{V}_{\mathrm{TH}})$ and current gain factor $(\beta)$ variabilities. Besides that, we demonstrated that the increase of $\mathrm{V}_{\mathrm{TH}}$ and $\beta$ variabilities at low temperature remains reasonably low in comparison to RT values and other CMOS technologies, so that it should not be detrimental to circuit operation in this range of temperatures.
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