S. Hosseini, E. Babaei, K. Varesi, M. Sabahi, S. Saeidabadi
{"title":"降低归一化电压应力的非隔离双输入高电压增益DC-DC变换器","authors":"S. Hosseini, E. Babaei, K. Varesi, M. Sabahi, S. Saeidabadi","doi":"10.1109/IEECON.2018.8712238","DOIUrl":null,"url":null,"abstract":"This paper proposes a double-input high voltage gain topology for Non-Isolated Non-Coupled Inductor (NINCI) based de-de converters. The proposed topology is capable of producing high voltage gains, while the Normalized Voltage Stress (NVS) on the switches/diodes remain low. Simple structure, continuous input currents and also the low current ripple of input sources are the advantages of proposed topology. The low/medium power applications are suggested for the proposed topology. In this paper, different operational modes and also steady state analyses of proposed topology have been presented. To verify effectiveness of proposed topology, it has been modeled and simulated in PSCAD/EMTDC software. Simulation results validate efficient performance and suitability of proposed topology.","PeriodicalId":6628,"journal":{"name":"2018 International Electrical Engineering Congress (iEECON)","volume":"22 1","pages":"1-4"},"PeriodicalIF":0.0000,"publicationDate":"2018-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A Non-Isolated Double-Input High Voltage Gain DC-DC Converter with Reduced Normalized Voltage Stress\",\"authors\":\"S. Hosseini, E. Babaei, K. Varesi, M. Sabahi, S. Saeidabadi\",\"doi\":\"10.1109/IEECON.2018.8712238\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a double-input high voltage gain topology for Non-Isolated Non-Coupled Inductor (NINCI) based de-de converters. The proposed topology is capable of producing high voltage gains, while the Normalized Voltage Stress (NVS) on the switches/diodes remain low. Simple structure, continuous input currents and also the low current ripple of input sources are the advantages of proposed topology. The low/medium power applications are suggested for the proposed topology. In this paper, different operational modes and also steady state analyses of proposed topology have been presented. To verify effectiveness of proposed topology, it has been modeled and simulated in PSCAD/EMTDC software. Simulation results validate efficient performance and suitability of proposed topology.\",\"PeriodicalId\":6628,\"journal\":{\"name\":\"2018 International Electrical Engineering Congress (iEECON)\",\"volume\":\"22 1\",\"pages\":\"1-4\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-03-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 International Electrical Engineering Congress (iEECON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEECON.2018.8712238\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Electrical Engineering Congress (iEECON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEECON.2018.8712238","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Non-Isolated Double-Input High Voltage Gain DC-DC Converter with Reduced Normalized Voltage Stress
This paper proposes a double-input high voltage gain topology for Non-Isolated Non-Coupled Inductor (NINCI) based de-de converters. The proposed topology is capable of producing high voltage gains, while the Normalized Voltage Stress (NVS) on the switches/diodes remain low. Simple structure, continuous input currents and also the low current ripple of input sources are the advantages of proposed topology. The low/medium power applications are suggested for the proposed topology. In this paper, different operational modes and also steady state analyses of proposed topology have been presented. To verify effectiveness of proposed topology, it has been modeled and simulated in PSCAD/EMTDC software. Simulation results validate efficient performance and suitability of proposed topology.