{"title":"用于多晶圆堆叠的晶圆级背对背混合键合","authors":"H. Li, M. Kawano, L. Ji, H. Ji, C. S. Lim","doi":"10.1109/EPTC50525.2020.9315154","DOIUrl":null,"url":null,"abstract":"This paper describes the demonstration of a 4-layer wafer stack using a combination of face-to-face and back-to-back, wafer-to-wafer hybrid bonding process. Details of process flow, process characterization and challenges in multi-layer wafer stacking are included in this paper. Wafer warpage of different pattern density is simulated with 3D finite element analysis (FEA) model. Wafer bow results match with low warpage results of simulation. 4-layer wafer was stacked together without separation. The process development and improvement carries out.","PeriodicalId":6790,"journal":{"name":"2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC)","volume":"55 1","pages":"468-471"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Wafer Level Back to Back Hybrid Bonding for Multiple Wafer Stacking\",\"authors\":\"H. Li, M. Kawano, L. Ji, H. Ji, C. S. Lim\",\"doi\":\"10.1109/EPTC50525.2020.9315154\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes the demonstration of a 4-layer wafer stack using a combination of face-to-face and back-to-back, wafer-to-wafer hybrid bonding process. Details of process flow, process characterization and challenges in multi-layer wafer stacking are included in this paper. Wafer warpage of different pattern density is simulated with 3D finite element analysis (FEA) model. Wafer bow results match with low warpage results of simulation. 4-layer wafer was stacked together without separation. The process development and improvement carries out.\",\"PeriodicalId\":6790,\"journal\":{\"name\":\"2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC)\",\"volume\":\"55 1\",\"pages\":\"468-471\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-12-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPTC50525.2020.9315154\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC50525.2020.9315154","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Wafer Level Back to Back Hybrid Bonding for Multiple Wafer Stacking
This paper describes the demonstration of a 4-layer wafer stack using a combination of face-to-face and back-to-back, wafer-to-wafer hybrid bonding process. Details of process flow, process characterization and challenges in multi-layer wafer stacking are included in this paper. Wafer warpage of different pattern density is simulated with 3D finite element analysis (FEA) model. Wafer bow results match with low warpage results of simulation. 4-layer wafer was stacked together without separation. The process development and improvement carries out.