C. Fenouillet-Béranger, L. Brunet, P. Batude, L. Brevard, X. Garros, T. M. Frutuoso, M. Cassé, J. Lugo, J. Lacord, D. Bosch, N. Bernard, A. Magalhaes-Lucas, M. Ribotta, B. Sklénard, F. Milési, R. Kies, G. Romano, P. Acosta-Alba, S. Kerdilès, A. Tavernier, C. Vizioz, P. Besson, R. Gassilloud, J. Kanyandekwe, D. Cooper, V. Lapras, W-H. Kim, Y. Sasaki, S. Oh, P. Kang, S.W. Lee, H. Na, J. Arcamone, F. Andrieu
{"title":"首次演示低温$(\\leq 500^{\\circ}\\mathrm{C})$ CMOS器件，具有功能RO和SRAM位单元，面向3D VLSI集成","authors":"C. Fenouillet-Béranger, L. Brunet, P. Batude, L. Brevard, X. Garros, T. M. Frutuoso, M. Cassé, J. Lugo, J. Lacord, D. Bosch, N. Bernard, A. Magalhaes-Lucas, M. Ribotta, B. Sklénard, F. Milési, R. Kies, G. Romano, P. Acosta-Alba, S. Kerdilès, A. Tavernier, C. Vizioz, P. Besson, R. Gassilloud, J. Kanyandekwe, D. Cooper, V. Lapras, W-H. Kim, Y. Sasaki, S. Oh, P. Kang, S.W. Lee, H. Na, J. Arcamone, F. Andrieu","doi":"10.1109/VLSITechnology18217.2020.9265092","DOIUrl":null,"url":null,"abstract":"For the first time FDSOI CMOS transistors with Si- monocrystalline channel have been fabricated at a temperature below 500°C. High performance PMOS $(\\mathrm{Ion}=450\\mu \\mathrm{A}/\\mu \\mathrm{m}$ (V dd −0.9V) @ $\\mathrm{Ioff}=-2\\mathrm{nA}/\\mu \\mathrm{mLg}=35\\mathrm{nm})$ with low overlap capacitance $(0.46\\mathrm{fF}/\\mu \\mathrm{m}$ per device), low gate resistance $(10\\Omega)$ at Low Temperature (L T) enables to achieve good RF Figure-Of-Merit (FOM) with Fmax values up to 170GHz. In addition, we demonstrate for the first time the full functionality of Ring Oscillators (RO) and SRAM bitcells processed at 500°C, paving the way for a high-performance 3D sequential CMOS integration.","PeriodicalId":6850,"journal":{"name":"2020 IEEE Symposium on VLSI Technology","volume":"44 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"First demonstration of low temperature $(\\\\leq 500^{\\\\circ}\\\\mathrm{C})$ CMOS devices featuring functional RO and SRAM bitcells toward 3D VLSI integration\",\"authors\":\"C. Fenouillet-Béranger, L. Brunet, P. Batude, L. Brevard, X. Garros, T. M. Frutuoso, M. Cassé, J. Lugo, J. Lacord, D. Bosch, N. Bernard, A. Magalhaes-Lucas, M. Ribotta, B. Sklénard, F. Milési, R. Kies, G. Romano, P. Acosta-Alba, S. Kerdilès, A. Tavernier, C. Vizioz, P. Besson, R. Gassilloud, J. Kanyandekwe, D. Cooper, V. Lapras, W-H. Kim, Y. Sasaki, S. Oh, P. Kang, S.W. Lee, H. Na, J. Arcamone, F. Andrieu\",\"doi\":\"10.1109/VLSITechnology18217.2020.9265092\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For the first time FDSOI CMOS transistors with Si- monocrystalline channel have been fabricated at a temperature below 500°C. High performance PMOS $(\\\\mathrm{Ion}=450\\\\mu \\\\mathrm{A}/\\\\mu \\\\mathrm{m}$ (V dd −0.9V) @ $\\\\mathrm{Ioff}=-2\\\\mathrm{nA}/\\\\mu \\\\mathrm{mLg}=35\\\\mathrm{nm})$ with low overlap capacitance $(0.46\\\\mathrm{fF}/\\\\mu \\\\mathrm{m}$ per device), low gate resistance $(10\\\\Omega)$ at Low Temperature (L T) enables to achieve good RF Figure-Of-Merit (FOM) with Fmax values up to 170GHz. In addition, we demonstrate for the first time the full functionality of Ring Oscillators (RO) and SRAM bitcells processed at 500°C, paving the way for a high-performance 3D sequential CMOS integration.\",\"PeriodicalId\":6850,\"journal\":{\"name\":\"2020 IEEE Symposium on VLSI Technology\",\"volume\":\"44 1\",\"pages\":\"1-2\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE Symposium on VLSI Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSITechnology18217.2020.9265092\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSITechnology18217.2020.9265092","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
First demonstration of low temperature $(\leq 500^{\circ}\mathrm{C})$ CMOS devices featuring functional RO and SRAM bitcells toward 3D VLSI integration
For the first time FDSOI CMOS transistors with Si- monocrystalline channel have been fabricated at a temperature below 500°C. High performance PMOS $(\mathrm{Ion}=450\mu \mathrm{A}/\mu \mathrm{m}$ (V dd −0.9V) @ $\mathrm{Ioff}=-2\mathrm{nA}/\mu \mathrm{mLg}=35\mathrm{nm})$ with low overlap capacitance $(0.46\mathrm{fF}/\mu \mathrm{m}$ per device), low gate resistance $(10\Omega)$ at Low Temperature (L T) enables to achieve good RF Figure-Of-Merit (FOM) with Fmax values up to 170GHz. In addition, we demonstrate for the first time the full functionality of Ring Oscillators (RO) and SRAM bitcells processed at 500°C, paving the way for a high-performance 3D sequential CMOS integration.
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