{"title":"一个简单的变宽CMOS碰撞电路","authors":"B. Minch","doi":"10.1109/ISCAS.2016.7527500","DOIUrl":null,"url":null,"abstract":"In this paper, I present a simple CMOS bump circuit whose transfer characteristic width is electronically adjustable via a single back-gate bias voltage. The proposed circuit comprises two asymmetric differential pairs whose transfer characteristics can be shifted left and right about the origin by adjusting this back-gate bias. One output current from each diff pair is fed into a current correlator circuit, which produces the bump current. The circuit can simultaneously produce a complementary antibump current by summing the other two diff pair currents. I describe the proposed circuit's operation, present a large-signal analysis for weak-inversion bias currents, and show measurements from a proof-of-principle prototype made from commercially available MOS transistor arrays.","PeriodicalId":6546,"journal":{"name":"2016 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"244 1","pages":"1354-1357"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A simple variable-width CMOS bump circuit\",\"authors\":\"B. Minch\",\"doi\":\"10.1109/ISCAS.2016.7527500\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, I present a simple CMOS bump circuit whose transfer characteristic width is electronically adjustable via a single back-gate bias voltage. The proposed circuit comprises two asymmetric differential pairs whose transfer characteristics can be shifted left and right about the origin by adjusting this back-gate bias. One output current from each diff pair is fed into a current correlator circuit, which produces the bump current. The circuit can simultaneously produce a complementary antibump current by summing the other two diff pair currents. I describe the proposed circuit's operation, present a large-signal analysis for weak-inversion bias currents, and show measurements from a proof-of-principle prototype made from commercially available MOS transistor arrays.\",\"PeriodicalId\":6546,\"journal\":{\"name\":\"2016 IEEE International Symposium on Circuits and Systems (ISCAS)\",\"volume\":\"244 1\",\"pages\":\"1354-1357\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE International Symposium on Circuits and Systems (ISCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.2016.7527500\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Symposium on Circuits and Systems (ISCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2016.7527500","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In this paper, I present a simple CMOS bump circuit whose transfer characteristic width is electronically adjustable via a single back-gate bias voltage. The proposed circuit comprises two asymmetric differential pairs whose transfer characteristics can be shifted left and right about the origin by adjusting this back-gate bias. One output current from each diff pair is fed into a current correlator circuit, which produces the bump current. The circuit can simultaneously produce a complementary antibump current by summing the other two diff pair currents. I describe the proposed circuit's operation, present a large-signal analysis for weak-inversion bias currents, and show measurements from a proof-of-principle prototype made from commercially available MOS transistor arrays.