Amro Awad, S. Suboh, Mao Ye, Kazi Abu Zubair, Mazen Al-Wadi
{"title":"持久安全处理器:保护非易失性存储器的挑战和机遇","authors":"Amro Awad, S. Suboh, Mao Ye, Kazi Abu Zubair, Mazen Al-Wadi","doi":"10.1109/ISVLSI.2019.00114","DOIUrl":null,"url":null,"abstract":"Emerging Non-Volatile Memories (NVMs) are getting close to their mass production stage. The persistence feature of NVMs enables many interesting applications and capabilities such as fast restoration, staging and direct access of persistent files. On the other hand, data persistence enlarges the attack surface due to data remanence. Additionally, since the memory data is expected to be restored, any accompanying security metadata must be recovered and restored correctly. While the main concepts of secure processors have been there for decades, designing persistently secure processors that are able to maintain security across system crashes/reboots is particularly challenging due to the trade-offs between write-endurance, resilience, performance and security. In this paper, we discuss the recent advances in this domain, challenges and future research opportunities.","PeriodicalId":6703,"journal":{"name":"2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","volume":"101 1","pages":"610-614"},"PeriodicalIF":0.0000,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"Persistently-Secure Processors: Challenges and Opportunities for Securing Non-Volatile Memories\",\"authors\":\"Amro Awad, S. Suboh, Mao Ye, Kazi Abu Zubair, Mazen Al-Wadi\",\"doi\":\"10.1109/ISVLSI.2019.00114\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Emerging Non-Volatile Memories (NVMs) are getting close to their mass production stage. The persistence feature of NVMs enables many interesting applications and capabilities such as fast restoration, staging and direct access of persistent files. On the other hand, data persistence enlarges the attack surface due to data remanence. Additionally, since the memory data is expected to be restored, any accompanying security metadata must be recovered and restored correctly. While the main concepts of secure processors have been there for decades, designing persistently secure processors that are able to maintain security across system crashes/reboots is particularly challenging due to the trade-offs between write-endurance, resilience, performance and security. In this paper, we discuss the recent advances in this domain, challenges and future research opportunities.\",\"PeriodicalId\":6703,\"journal\":{\"name\":\"2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)\",\"volume\":\"101 1\",\"pages\":\"610-614\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISVLSI.2019.00114\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2019.00114","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Persistently-Secure Processors: Challenges and Opportunities for Securing Non-Volatile Memories
Emerging Non-Volatile Memories (NVMs) are getting close to their mass production stage. The persistence feature of NVMs enables many interesting applications and capabilities such as fast restoration, staging and direct access of persistent files. On the other hand, data persistence enlarges the attack surface due to data remanence. Additionally, since the memory data is expected to be restored, any accompanying security metadata must be recovered and restored correctly. While the main concepts of secure processors have been there for decades, designing persistently secure processors that are able to maintain security across system crashes/reboots is particularly challenging due to the trade-offs between write-endurance, resilience, performance and security. In this paper, we discuss the recent advances in this domain, challenges and future research opportunities.