{"title":"用PLZT/STO/Si(100)结构制备mfi - fet","authors":"E. Tokumitsu, R. Nakamura, H. Ishiwara","doi":"10.1109/ISAF.1996.602719","DOIUrl":null,"url":null,"abstract":"We report fabrication and characterization of p-channel metal-ferroelectric-insulator-semiconductor (MFIS)-FETs using the PLZT/STO/Si(100) structures and demonstrate nonvolatile memory operations of the MFISFETs. It is found that I/sub D/-V/sub G/ characteristics of PLZT/STO/Si MFIS-FETs show a hysteresis loop due to the ferroelectric nature of the PLZT film. It is also demonstrated that the I/sub D/ can be controlled by the \"write\" pulse, which was applied before the measurements, even at the same \"read\" gate voltage.","PeriodicalId":14772,"journal":{"name":"ISAF '96. Proceedings of the Tenth IEEE International Symposium on Applications of Ferroelectrics","volume":"86 1","pages":"107-110 vol.1"},"PeriodicalIF":0.0000,"publicationDate":"1996-08-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Fabrication of MFIS-FETs using PLZT/STO/Si(100) structures\",\"authors\":\"E. Tokumitsu, R. Nakamura, H. Ishiwara\",\"doi\":\"10.1109/ISAF.1996.602719\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We report fabrication and characterization of p-channel metal-ferroelectric-insulator-semiconductor (MFIS)-FETs using the PLZT/STO/Si(100) structures and demonstrate nonvolatile memory operations of the MFISFETs. It is found that I/sub D/-V/sub G/ characteristics of PLZT/STO/Si MFIS-FETs show a hysteresis loop due to the ferroelectric nature of the PLZT film. It is also demonstrated that the I/sub D/ can be controlled by the \\\"write\\\" pulse, which was applied before the measurements, even at the same \\\"read\\\" gate voltage.\",\"PeriodicalId\":14772,\"journal\":{\"name\":\"ISAF '96. Proceedings of the Tenth IEEE International Symposium on Applications of Ferroelectrics\",\"volume\":\"86 1\",\"pages\":\"107-110 vol.1\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-08-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ISAF '96. Proceedings of the Tenth IEEE International Symposium on Applications of Ferroelectrics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISAF.1996.602719\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ISAF '96. Proceedings of the Tenth IEEE International Symposium on Applications of Ferroelectrics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISAF.1996.602719","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fabrication of MFIS-FETs using PLZT/STO/Si(100) structures
We report fabrication and characterization of p-channel metal-ferroelectric-insulator-semiconductor (MFIS)-FETs using the PLZT/STO/Si(100) structures and demonstrate nonvolatile memory operations of the MFISFETs. It is found that I/sub D/-V/sub G/ characteristics of PLZT/STO/Si MFIS-FETs show a hysteresis loop due to the ferroelectric nature of the PLZT film. It is also demonstrated that the I/sub D/ can be controlled by the "write" pulse, which was applied before the measurements, even at the same "read" gate voltage.