{"title":"低密度奇偶校验码的实用低复杂度译码研究","authors":"Zhiqiang Cui, Zhongfeng Wang","doi":"10.1109/SIPS.2007.4387547","DOIUrl":null,"url":null,"abstract":"This paper studies practical low complexity decoding of Low Density Parity-Check (LDPC) codes. We first investigate VLSI implementation issues of two state-of-the-art Weighted Bit Flipping (WBF) based decoding algorithms that were recently proposed in the literature. Then we present an optimized 2-bit soft decoding approach. It is shown that the proposed approach has comparable hardware complexity with either of the two WBF-based algorithms while it has significantly better decoding performance.","PeriodicalId":93225,"journal":{"name":"Proceedings. IEEE Workshop on Signal Processing Systems (2007-2014)","volume":"26 1","pages":"216-221"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Studies on Practical Low Complexity Decoding of Low-Density Parity-Check Codes\",\"authors\":\"Zhiqiang Cui, Zhongfeng Wang\",\"doi\":\"10.1109/SIPS.2007.4387547\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper studies practical low complexity decoding of Low Density Parity-Check (LDPC) codes. We first investigate VLSI implementation issues of two state-of-the-art Weighted Bit Flipping (WBF) based decoding algorithms that were recently proposed in the literature. Then we present an optimized 2-bit soft decoding approach. It is shown that the proposed approach has comparable hardware complexity with either of the two WBF-based algorithms while it has significantly better decoding performance.\",\"PeriodicalId\":93225,\"journal\":{\"name\":\"Proceedings. IEEE Workshop on Signal Processing Systems (2007-2014)\",\"volume\":\"26 1\",\"pages\":\"216-221\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-11-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. IEEE Workshop on Signal Processing Systems (2007-2014)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIPS.2007.4387547\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. IEEE Workshop on Signal Processing Systems (2007-2014)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIPS.2007.4387547","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Studies on Practical Low Complexity Decoding of Low-Density Parity-Check Codes
This paper studies practical low complexity decoding of Low Density Parity-Check (LDPC) codes. We first investigate VLSI implementation issues of two state-of-the-art Weighted Bit Flipping (WBF) based decoding algorithms that were recently proposed in the literature. Then we present an optimized 2-bit soft decoding approach. It is shown that the proposed approach has comparable hardware complexity with either of the two WBF-based algorithms while it has significantly better decoding performance.
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