用移相光刻技术制备的0.1 μ m栅高架源极和漏极MOSFET

International Electron Devices Meeting 1991 [Technical Digest] Pub Date : 1991-12-08 DOI:10.1109/IEDM.1991.235269

S. Kimura, H. Noda, D. Hisamoto, E. Takeda

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引用次数: 18

摘要

只提供摘要形式。利用移相光刻技术制备了一种新型的0.1 μ m栅极高架源极和漏极MOSFET。相移光刻技术实现了小于0.2 μ m的间距，结合侧壁氧化膜形成技术，得到了0.1 μ m的栅长。结论是，利用相移光刻技术的新型栅极定义工艺在未来的超小型器件制造中具有广阔的前景。

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A 0.1 mu m-gate elevated source and drain MOSFET fabricated by phase-shifted lithography

Summary form only given. A novel 0.1- mu m-gate elevated source and drain MOSFET was fabricated utilizing phase-shifted lithography. Phase-shifted lithography enabled less than 0.2- mu m spacing, resulting in a 0.1- mu m gate length in combination with a side-wall oxide film formation technique. It is concluded that the new gate definition process utilizing phase-shifted lithography will be promising for future ultrasmall device fabrication.<>

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来源期刊

International Electron Devices Meeting 1991 [Technical Digest]

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