{"title":"H.264/AVC在可编程数字信号处理器上的快速块模式决策","authors":"Wonchul Lee, Hyojin Choi, Wonyong Sung","doi":"10.1109/SIPS.2007.4387539","DOIUrl":null,"url":null,"abstract":"Variable block size motion estimation (ME) is one of the new coding tools for H.264/AVC encoder to enhance the video performance. However, the complexity of the variable block size ME is very high because the motion estimation and rate-distortion optimization need to be performed repeatedly for all the possible block mode combinations. In order to reduce this, we propose a new block mode decision algorithm, which can decide the block mode efficiently without trying all the block modes by using the spatial property of image sequences. The experimental results on a VLIW (Very Long Instruction Word) ¿ SIMD (Single Instruction Multiple Data) programmable digital signal processor (DSP) show that the proposed algorithm can save the CPU clock cycles by 47% for the integer-pel ME and 83% for the sub-pel ME. The video performance degradation in terms of PSNR and bitrates is 0.12 dB and 1.04%, respectively.","PeriodicalId":93225,"journal":{"name":"Proceedings. IEEE Workshop on Signal Processing Systems (2007-2014)","volume":"74 1","pages":"169-174"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Fast Block Mode Decision for H.264/AVC on a Programmable Digital Signal Processor\",\"authors\":\"Wonchul Lee, Hyojin Choi, Wonyong Sung\",\"doi\":\"10.1109/SIPS.2007.4387539\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Variable block size motion estimation (ME) is one of the new coding tools for H.264/AVC encoder to enhance the video performance. However, the complexity of the variable block size ME is very high because the motion estimation and rate-distortion optimization need to be performed repeatedly for all the possible block mode combinations. In order to reduce this, we propose a new block mode decision algorithm, which can decide the block mode efficiently without trying all the block modes by using the spatial property of image sequences. The experimental results on a VLIW (Very Long Instruction Word) ¿ SIMD (Single Instruction Multiple Data) programmable digital signal processor (DSP) show that the proposed algorithm can save the CPU clock cycles by 47% for the integer-pel ME and 83% for the sub-pel ME. The video performance degradation in terms of PSNR and bitrates is 0.12 dB and 1.04%, respectively.\",\"PeriodicalId\":93225,\"journal\":{\"name\":\"Proceedings. IEEE Workshop on Signal Processing Systems (2007-2014)\",\"volume\":\"74 1\",\"pages\":\"169-174\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-11-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. IEEE Workshop on Signal Processing Systems (2007-2014)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIPS.2007.4387539\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. IEEE Workshop on Signal Processing Systems (2007-2014)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIPS.2007.4387539","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fast Block Mode Decision for H.264/AVC on a Programmable Digital Signal Processor
Variable block size motion estimation (ME) is one of the new coding tools for H.264/AVC encoder to enhance the video performance. However, the complexity of the variable block size ME is very high because the motion estimation and rate-distortion optimization need to be performed repeatedly for all the possible block mode combinations. In order to reduce this, we propose a new block mode decision algorithm, which can decide the block mode efficiently without trying all the block modes by using the spatial property of image sequences. The experimental results on a VLIW (Very Long Instruction Word) ¿ SIMD (Single Instruction Multiple Data) programmable digital signal processor (DSP) show that the proposed algorithm can save the CPU clock cycles by 47% for the integer-pel ME and 83% for the sub-pel ME. The video performance degradation in terms of PSNR and bitrates is 0.12 dB and 1.04%, respectively.