Y. Kayaba, Yuzo Nakamura, T. Kozeki, J. Kamada, K. Kohmura
{"title":"一种用于3D/2.5D硅片低温堆叠的薄胶粘剂","authors":"Y. Kayaba, Yuzo Nakamura, T. Kozeki, J. Kamada, K. Kohmura","doi":"10.1109/IITC51362.2021.9537390","DOIUrl":null,"url":null,"abstract":"The bonding property of a thin adhesive for the high density 3D/2.5D Si chip integration with the Cu-Cu bonding at the low temperature range (150–400 °C) was investigated. The cured thin adhesive is bondable to SiO2 after baking at 150 °C with the high surface energy (6.4 J/m2). By using this adhesive Si chip can be integrated in 3D/2.5D with no thermal sliding and no adhesive protrusion from the chip corner. The reliability test results are also investigated.","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2021-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A Thin Adhesive for 3D/2.5D Si Chip Stacking at Low Temperature\",\"authors\":\"Y. Kayaba, Yuzo Nakamura, T. Kozeki, J. Kamada, K. Kohmura\",\"doi\":\"10.1109/IITC51362.2021.9537390\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The bonding property of a thin adhesive for the high density 3D/2.5D Si chip integration with the Cu-Cu bonding at the low temperature range (150–400 °C) was investigated. The cured thin adhesive is bondable to SiO2 after baking at 150 °C with the high surface energy (6.4 J/m2). By using this adhesive Si chip can be integrated in 3D/2.5D with no thermal sliding and no adhesive protrusion from the chip corner. The reliability test results are also investigated.\",\"PeriodicalId\":6823,\"journal\":{\"name\":\"2021 IEEE International Interconnect Technology Conference (IITC)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-07-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE International Interconnect Technology Conference (IITC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IITC51362.2021.9537390\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Interconnect Technology Conference (IITC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IITC51362.2021.9537390","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Thin Adhesive for 3D/2.5D Si Chip Stacking at Low Temperature
The bonding property of a thin adhesive for the high density 3D/2.5D Si chip integration with the Cu-Cu bonding at the low temperature range (150–400 °C) was investigated. The cured thin adhesive is bondable to SiO2 after baking at 150 °C with the high surface energy (6.4 J/m2). By using this adhesive Si chip can be integrated in 3D/2.5D with no thermal sliding and no adhesive protrusion from the chip corner. The reliability test results are also investigated.