Graphene-diamond-silicon devices with increased current-carrying capacity: sp2-Carbon-sp3-Carbon-on-Silicon technology

Graphene demonstrated potential for practical applications owing to its excellent electronic and thermal properties. Typical graphene field-effect transistors (FETs) and interconnects built on conventional SiO2/Si substrates reveal the breakdown current density on the order of 108 A/cm2, which is ~100× larger than the fundamental limit for the metals but still smaller than the maximum achieved in carbon nanotubes. It was discovered by some of us that graphene has excellent thermal conduction properties with the thermal conductivity K exceeding 2000 W/mK at room temperature [1]. Few-layer graphene largely preserves the heat conduction properties [2]. However, the thermally resistive SiO2, with the thermal conductivity in the range from 0.5 to 1.4 W/mK, creates a bottleneck for heat removal. The latter does not allow graphene to demonstrate its true current-carrying potential. We show that by replacing SiO2 with synthetic diamond one can substantially increase the current-carrying capacity of graphene to as high as ~ 20×108 A/cm2 under ambient conditions. The two-terminal and three-terminal top-gated graphene devices (see Figure 1) were fabricated on synthetic single-crystal diamond (SCD) and ultrananocrystalline diamond (UNCD). To ensure Si integration, the UNCD layers were grown at low temperatures compatible with Si CMOS technology [3]. Our results indicate that graphene's current-induced breakdown is thermally activated. It was found that the current carrying capacity of graphene can be improved not only on SCD but also on an inexpensive UNCD. The latter was attributed to the decreased thermal resistance of UNCD at elevated temperatures (see Figure 2). The obtained results are important for graphene's hetero-integration on Si substrates. The enhanced current-carrying capacity is beneficial for the proposed applications of graphene in interconnects and high-frequency transistors.