{"title":"热收集应用的电荷恢复逻辑","authors":"Leo Filippini, B. Taskin","doi":"10.1109/ISCAS.2016.7527297","DOIUrl":null,"url":null,"abstract":"This paper investigates the substitution of CMOS or near-threshold CMOS with Charge Recovery Logic (CRL) in applications where energy is thermally harvested. By doing so, it is possible to eliminate the bulky DC/DC stage needed to provide the supply voltage for CMOS operation. Instead, a simple LC-tank oscillator is used to generate a power-clock suitable for CRL operation. Simulation results of a 256-stage inverter chain designed in Efficient Charge Recovery Logic (ECRL) are presented. Two additional novelties are presented i) using ECRL at a near-threshold voltage and ii) generating the four-phase power-clock by means of a quadrature oscillator. The traditional, full-swing CMOS system dissipates 18.2× the power dissipated by the proposed TP-ECRL system.","PeriodicalId":6546,"journal":{"name":"2016 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"87 1","pages":"542-545"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Charge recovery logic for thermal harvesting applications\",\"authors\":\"Leo Filippini, B. Taskin\",\"doi\":\"10.1109/ISCAS.2016.7527297\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper investigates the substitution of CMOS or near-threshold CMOS with Charge Recovery Logic (CRL) in applications where energy is thermally harvested. By doing so, it is possible to eliminate the bulky DC/DC stage needed to provide the supply voltage for CMOS operation. Instead, a simple LC-tank oscillator is used to generate a power-clock suitable for CRL operation. Simulation results of a 256-stage inverter chain designed in Efficient Charge Recovery Logic (ECRL) are presented. Two additional novelties are presented i) using ECRL at a near-threshold voltage and ii) generating the four-phase power-clock by means of a quadrature oscillator. The traditional, full-swing CMOS system dissipates 18.2× the power dissipated by the proposed TP-ECRL system.\",\"PeriodicalId\":6546,\"journal\":{\"name\":\"2016 IEEE International Symposium on Circuits and Systems (ISCAS)\",\"volume\":\"87 1\",\"pages\":\"542-545\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE International Symposium on Circuits and Systems (ISCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.2016.7527297\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Symposium on Circuits and Systems (ISCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2016.7527297","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Charge recovery logic for thermal harvesting applications
This paper investigates the substitution of CMOS or near-threshold CMOS with Charge Recovery Logic (CRL) in applications where energy is thermally harvested. By doing so, it is possible to eliminate the bulky DC/DC stage needed to provide the supply voltage for CMOS operation. Instead, a simple LC-tank oscillator is used to generate a power-clock suitable for CRL operation. Simulation results of a 256-stage inverter chain designed in Efficient Charge Recovery Logic (ECRL) are presented. Two additional novelties are presented i) using ECRL at a near-threshold voltage and ii) generating the four-phase power-clock by means of a quadrature oscillator. The traditional, full-swing CMOS system dissipates 18.2× the power dissipated by the proposed TP-ECRL system.