{"title":"基于Matlab/Simulink的电力电子控制FPGA快速设计实例","authors":"Juan Pablo Tettamanti, A. Latini, M. Aguirre","doi":"10.1109/SPL.2011.5782627","DOIUrl":null,"url":null,"abstract":"This paper deals with the problem of the design of an all-digital implementation of a three-phase PLL and the control logic of a shunt active filter implemented with a Multilevel Current Source Inverter (MCSI). The active filter is connected to the medium voltage level of a power distribution system where compensation of reactive power and harmonics is mandatory. The PLL is essential to obtain a reference frame for grid synchronization. The performance of proposed PLL structure and logic control is simulated via Matlab/Simulink. The proposed PLL structure shows fast synchronization and adequate tolerance to grid voltage unbalance. Both the PLL and the control logic can be downloaded and tested on a Field-Programmable-Gate-Array (FPGA) using the same software tool.","PeriodicalId":6329,"journal":{"name":"2011 VII Southern Conference on Programmable Logic (SPL)","volume":"23 1","pages":"69-74"},"PeriodicalIF":0.0000,"publicationDate":"2011-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"An example of rapid design of power electronics control with FPGA in Matlab/Simulink\",\"authors\":\"Juan Pablo Tettamanti, A. Latini, M. Aguirre\",\"doi\":\"10.1109/SPL.2011.5782627\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper deals with the problem of the design of an all-digital implementation of a three-phase PLL and the control logic of a shunt active filter implemented with a Multilevel Current Source Inverter (MCSI). The active filter is connected to the medium voltage level of a power distribution system where compensation of reactive power and harmonics is mandatory. The PLL is essential to obtain a reference frame for grid synchronization. The performance of proposed PLL structure and logic control is simulated via Matlab/Simulink. The proposed PLL structure shows fast synchronization and adequate tolerance to grid voltage unbalance. Both the PLL and the control logic can be downloaded and tested on a Field-Programmable-Gate-Array (FPGA) using the same software tool.\",\"PeriodicalId\":6329,\"journal\":{\"name\":\"2011 VII Southern Conference on Programmable Logic (SPL)\",\"volume\":\"23 1\",\"pages\":\"69-74\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-04-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 VII Southern Conference on Programmable Logic (SPL)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SPL.2011.5782627\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 VII Southern Conference on Programmable Logic (SPL)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPL.2011.5782627","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An example of rapid design of power electronics control with FPGA in Matlab/Simulink
This paper deals with the problem of the design of an all-digital implementation of a three-phase PLL and the control logic of a shunt active filter implemented with a Multilevel Current Source Inverter (MCSI). The active filter is connected to the medium voltage level of a power distribution system where compensation of reactive power and harmonics is mandatory. The PLL is essential to obtain a reference frame for grid synchronization. The performance of proposed PLL structure and logic control is simulated via Matlab/Simulink. The proposed PLL structure shows fast synchronization and adequate tolerance to grid voltage unbalance. Both the PLL and the control logic can be downloaded and tested on a Field-Programmable-Gate-Array (FPGA) using the same software tool.