利用选择性氧化技术降低翅片沟道mosfet源极/漏极串联电阻

Young‐Kyun Cho
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引用次数: 0

摘要

针对翅片沟道金属氧化物半导体场效应晶体管(MOSFET)的低源/漏极(S/D)串联电阻,提出了一种新的选择性氧化工艺。采用该技术制备的选择性氧化鳍状沟道MOSFET (SoxFET)具有栅极全方位结构和逐渐增强的S/D扩展区。与控制器件相比,SoxFET的S/D串联电阻降低了70%以上。结果表明,与控制器件相比,SoxFET不仅具有更高的驱动电流,而且具有更高的跨导率,具有抑制亚阈值摆幅和降低漏极诱导势垒(DIBL)的特性。SoxFET的饱和电流、阈值电压、峰值线性跨导、峰值饱和跨导、亚阈值摆幅和DIBL分别为305 μA/μm、0.33 V、13.5 μS、76.4 μS、78 mV/dec和62 mV/V。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Reduction of Source/Drain Series Resistance in Fin Channel MOSFETs Using Selective Oxidation Technique
A novel selective oxidation process has been developed for low source/drain (S/D) series resistance of the fin channel metal oxide semiconductor field effect transistor (MOSFET). Using this technique, the selective oxidation fin-channel MOSFET (SoxFET) has the gate-all-around structure and gradually enhanced S/D extension regions. The SoxFET demonstrated over 70% reduction in S/D series resistance compared to the control device. Moreover, it was found that the SoxFET behaved better in performance, not only a higher drive current but also higher transconductances with suppressing subthreshold swing and drain induced barrier lowering (DIBL) characteristics, than the control device. The saturation current, threshold voltage, peak linear transconductance, peak saturation transconductance, subthreshold swing, and DIBL for the fabricated SoxFET are 305 μA/μm, 0.33 V, 13.5 μS, 76.4 μS, 78 mV/dec, and 62 mV/V, respectively.
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